WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

AMD together we advance_

The Role : The candidate will be a member of the design team responsible for defining, specifying, and implementing future SerDes and memory interface (e.g. DDR) IP.

The Person : 

• Strong/effective communication skills
• Enthusiastic team-first mentality
• A self-starting mentality and able to work with a limited amount of supervision

Responsibilities :

• Define microarchitecture and design/implement various state-of-the-art, high-speed (up to 32+Gbps) analog/mixed-signal blocks for SerDes and memory interface PHYs
• Deliver detailed specifications & documentation
• Develop initial circuit schematics and work closely with layout designers to drive designs to completion (including physical verification and backend/reliability flows)
• Drive design and layout reviews to ensure quality of deliverables and mitigate overall risk
• Work closely with various disciplines (e.g. Layout, Logical Design, Physical Design, Firmware, and Design Verification) to ensure successful cross-team engagement and high-quality execution

Preferred Skilled Set:

• Solid knowledge in high-speed SerDes or memory interface designs (signaling/equalization techniques, analog/mixed-signal circuit design, and signal integrity)
• Experience with advanced, deep submicron semiconductor technologies (experience with FinFET technology a plus)
• Solid knowledge of industry-standard tools and practices for analog/mixed-signal and high-speed digital designs (e.g., HSPICE simulator, Cadence design environment)
• Ability to analyze design issues at an abstract level (e.g., via mathematical and/or behavioral modeling)
• Analytical thinking and inventive spirit in combination with a solid understanding of risks and risk mitigation
• Familiarity with Perl, Python, and/or MATLAB
• Ability to read and/or create Verilog models
• Experience with Unix/Linux environments

Education:

• BS, MS relevant experience in electrical engineering and/or computer architecture

#LI-DC1

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

The Role : The candidate will be a member of the design team responsible for defining, specifying, and implementing future SerDes and memory interface (e.g. DDR) IP.

The Person : 

• Strong/effective communication skills
• Enthusiastic team-first mentality
• A self-starting mentality and able to work with a limited amount of supervision

Responsibilities :

• Define microarchitecture and design/implement various state-of-the-art, high-speed (up to 32+Gbps) analog/mixed-signal blocks for SerDes and memory interface PHYs
• Deliver detailed specifications & documentation
• Develop initial circuit schematics and work closely with layout designers to drive designs to completion (including physical verification and backend/reliability flows)
• Drive design and layout reviews to ensure quality of deliverables and mitigate overall risk
• Work closely with various disciplines (e.g. Layout, Logical Design, Physical Design, Firmware, and Design Verification) to ensure successful cross-team engagement and high-quality execution

Preferred Skilled Set:

• Solid knowledge in high-speed SerDes or memory interface designs (signaling/equalization techniques, analog/mixed-signal circuit design, and signal integrity)
• Experience with advanced, deep submicron semiconductor technologies (experience with FinFET technology a plus)
• Solid knowledge of industry-standard tools and practices for analog/mixed-signal and high-speed digital designs (e.g., HSPICE simulator, Cadence design environment)
• Ability to analyze design issues at an abstract level (e.g., via mathematical and/or behavioral modeling)
• Analytical thinking and inventive spirit in combination with a solid understanding of risks and risk mitigation
• Familiarity with Perl, Python, and/or MATLAB
• Ability to read and/or create Verilog models
• Experience with Unix/Linux environments

Education:

• BS, MS relevant experience in electrical engineering and/or computer architecture

#LI-DC1