Circuit design Engineer (Programable Clock)

Feb 29, 2024
San Jose, United States
... Not specified
... Intermediate
Full time
... Office work


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Circuit Design Engineer (Programable Clock)

 

THE ROLE:

An integral part of AMD’s programmable logic group, the global Clock team is tasked with implementing the programmable clock and Methodologies of AMD’s growing range of Adaptive-Embedded Computing products. Every new Adaptive SOC brings a new set of programable Clock challenges with their latest system and functional architectures and their adoption of new semiconductor and packaging technologies. The Global Clock team works closely with functional architecture, Programable fabric, integration and SW teams to craft and implement new clock solutions, including new architectures, Clock IPs, tools and flows.

This position invites candidates to join a clock team of experts, inventing and implementing original solutions, addressing challenging clock problems in some of the industry’s largest and most complex SOCs.

THE PERSON:

You have a passion for modern, complex Adaptive computing architecture, Circuit design, digital design, and it's validation in post Silicon. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Enjoy collaborating with engineers with their diverse skillsets and bring their expertise to bear on solving challenging Programable Clock problems. 

 

KEY RESPONSIBILITIES:

  • Investigate Clock architectures and Circuits solution, Determine creative design approaches and parameters.
  • Programable global Clock distribution methodologies optimizing Clock - Skew, Jitter, DCD, Signal integrity and power integrity issues.
  • Contribute to architecture specification and circuit design for advanced energy efficient Programable Clock, deskew Circuit etc.
  • Supervise layout design with floorplan and signal flow guidance. Post-layout simulation for reliability check such as Aging/self heating/Monte Carlo/electromigration etc.
  • Work and collaborate with domain teams (e.g. Layout, Logical Design, Physical Design, Integration and SW)
  • Implement IP in FPGA environment using Vivado or similar tools/flows.
  • Support post-silicon effort to Validate and Characterize the Programmable Clock.
  • Improve the efficiency and quality using scripting and programming.

 

PREFERRED EXPERIENCE:

  • Strong VLSI Fundamentals, Circuits design & Digital Systems, deep submicron CMOS design based on FinFETs technology.
  • Solid fundamentals in circuit analysis and Clock Circuit design
  • Experience with high speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.)
  • Solid understanding of transmission line and EM wave theory is a plus
  • Circuit Design Tools: Cadence (Virtuoso - Schematics and Layout), ADE-XL, Spectre.
  • Prior work experience in FPGA design using VIVADO tool and silicon testing is a plus.
  • Verilog, Perl/Python/C++ scripting and programming.
  • Experience in DLL design is a plus.

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 




At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Circuit Design Engineer (Programable Clock)

 

THE ROLE:

An integral part of AMD’s programmable logic group, the global Clock team is tasked with implementing the programmable clock and Methodologies of AMD’s growing range of Adaptive-Embedded Computing products. Every new Adaptive SOC brings a new set of programable Clock challenges with their latest system and functional architectures and their adoption of new semiconductor and packaging technologies. The Global Clock team works closely with functional architecture, Programable fabric, integration and SW teams to craft and implement new clock solutions, including new architectures, Clock IPs, tools and flows.

This position invites candidates to join a clock team of experts, inventing and implementing original solutions, addressing challenging clock problems in some of the industry’s largest and most complex SOCs.

THE PERSON:

You have a passion for modern, complex Adaptive computing architecture, Circuit design, digital design, and it's validation in post Silicon. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Enjoy collaborating with engineers with their diverse skillsets and bring their expertise to bear on solving challenging Programable Clock problems. 

 

KEY RESPONSIBILITIES:

  • Investigate Clock architectures and Circuits solution, Determine creative design approaches and parameters.
  • Programable global Clock distribution methodologies optimizing Clock - Skew, Jitter, DCD, Signal integrity and power integrity issues.
  • Contribute to architecture specification and circuit design for advanced energy efficient Programable Clock, deskew Circuit etc.
  • Supervise layout design with floorplan and signal flow guidance. Post-layout simulation for reliability check such as Aging/self heating/Monte Carlo/electromigration etc.
  • Work and collaborate with domain teams (e.g. Layout, Logical Design, Physical Design, Integration and SW)
  • Implement IP in FPGA environment using Vivado or similar tools/flows.
  • Support post-silicon effort to Validate and Characterize the Programmable Clock.
  • Improve the efficiency and quality using scripting and programming.

 

PREFERRED EXPERIENCE:

  • Strong VLSI Fundamentals, Circuits design & Digital Systems, deep submicron CMOS design based on FinFETs technology.
  • Solid fundamentals in circuit analysis and Clock Circuit design
  • Experience with high speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.)
  • Solid understanding of transmission line and EM wave theory is a plus
  • Circuit Design Tools: Cadence (Virtuoso - Schematics and Layout), ADE-XL, Spectre.
  • Prior work experience in FPGA design using VIVADO tool and silicon testing is a plus.
  • Verilog, Perl/Python/C++ scripting and programming.
  • Experience in DLL design is a plus.

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

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