Co-Packaged Photonics Hardware Development Engineer

Feb 11, 2024
San Jose, United States
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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THE ROLE:

We are looking for a candidate to join the silicon-packaging team and work together with the SerDes and photonics/IC design engineers, system/board engineers, partner and vendor engineering teams on product and supply chain development involving co-package optics (CPO). 

 

THE PERSON:

This person has excellent verbal and written communication skills. Is a great team player and a problem solver. Has a proven track record of working across organization boundaries and driving complex programs to successful completion through collaboration. Is thoughtful, efficient, disciplined and has a tenacious commitment to continuous improvement and relentless drive to win. 

 

 

KEY RESPONSIBILITIES:

 

  • Package Architecture and design with CPO, Silicon and packaging process development, PIC Optical Testing, SI, Technology and product bring-up,
  • Fiber integration HVM supply chain development and qualification working with partners and internal teams
  • Work with 3rd party partners, foundry and OSAT to bring CPO from concept to HVM

 

 

PREFERRED EXPERIENCE:

  • Experience in Optoelectronic hardware and silicon-package development bringing products to market
  • Experienced in Heterogeneous Integration, Design Enablement, Advanced Packaging and CPO
  • Strong Knowledge in Photonics Device, PIC Silicon and Packaging Process, Fiber Integration Technology and Supply Chain, Design for Reliability
  • Knowledge in advanced IC packaging technologies a strong plus
  • Direct experience in CPO is a must
  • Experience using photonics simulation tools (e.g., Lumerical, Cadence, Synopsys, Ansys) and familiarity with mechanical design tools such as SolidWorks, Creo a plus
  • Excellent knowledge of DFM (Design for Manufacturing), including experience with volume manufacturing in Asia as well as North America
  • Experience with Design of Experiments, instrumentation, optical characterization, data acquisition and analysis, including uncertainty analysis.  Understanding on mechanical and fiber process characterization tools such as Optical inspection, Shadow Moire’, DIC, FIB, SEM, TMA, DMA, MTS, X-ray, C-SAM, T-SAM

 

ACADEMIC CREDENTIALS:

  • Ph.D. in Physics, Electrical Engineering, Mechanical Engineering or related field AND years of (post college) work experience in an optoelectronics technology and product bring-up role

 

 

LOCATION: San Jose, CA

 

#LI-DW1

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE:

We are looking for a candidate to join the silicon-packaging team and work together with the SerDes and photonics/IC design engineers, system/board engineers, partner and vendor engineering teams on product and supply chain development involving co-package optics (CPO). 

 

THE PERSON:

This person has excellent verbal and written communication skills. Is a great team player and a problem solver. Has a proven track record of working across organization boundaries and driving complex programs to successful completion through collaboration. Is thoughtful, efficient, disciplined and has a tenacious commitment to continuous improvement and relentless drive to win. 

 

 

KEY RESPONSIBILITIES:

 

  • Package Architecture and design with CPO, Silicon and packaging process development, PIC Optical Testing, SI, Technology and product bring-up,
  • Fiber integration HVM supply chain development and qualification working with partners and internal teams
  • Work with 3rd party partners, foundry and OSAT to bring CPO from concept to HVM

 

 

PREFERRED EXPERIENCE:

  • Experience in Optoelectronic hardware and silicon-package development bringing products to market
  • Experienced in Heterogeneous Integration, Design Enablement, Advanced Packaging and CPO
  • Strong Knowledge in Photonics Device, PIC Silicon and Packaging Process, Fiber Integration Technology and Supply Chain, Design for Reliability
  • Knowledge in advanced IC packaging technologies a strong plus
  • Direct experience in CPO is a must
  • Experience using photonics simulation tools (e.g., Lumerical, Cadence, Synopsys, Ansys) and familiarity with mechanical design tools such as SolidWorks, Creo a plus
  • Excellent knowledge of DFM (Design for Manufacturing), including experience with volume manufacturing in Asia as well as North America
  • Experience with Design of Experiments, instrumentation, optical characterization, data acquisition and analysis, including uncertainty analysis.  Understanding on mechanical and fiber process characterization tools such as Optical inspection, Shadow Moire’, DIC, FIB, SEM, TMA, DMA, MTS, X-ray, C-SAM, T-SAM

 

ACADEMIC CREDENTIALS:

  • Ph.D. in Physics, Electrical Engineering, Mechanical Engineering or related field AND years of (post college) work experience in an optoelectronics technology and product bring-up role

 

 

LOCATION: San Jose, CA

 

#LI-DW1

#HYBRID

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