Design for Debug (DFD) Engineer

Feb 28, 2024
Austin, United States
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




THE ROLE: 

We are looking for an adaptive, self-motivated DFD engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The NBIO DFx team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

 

THE PERSON: 

Will have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

 

KEY RESPONSIBILITIES:

  • Definition and RTL Implementation of DFD architecture and features in NBIO IPs and Subsystems
  • Drive DFD features RTL integration and verification work
  • Thorough understanding of industry standard busses, such as PCIe, and other high-speed IO protocol is required in addition to detailed knowledge of high-speed digital design and signal integrity
  • Work with designers and Si debug teams to improve debuggability
  • Work with NBIO Debug and Emulation teams for common tools and scripts usage
  • Provide technical support to SoC and Post-Si teams to ensure successful bring up and enhance debug learning
  • Mentor and coach junior engineers

PREFERRED EXPERIENCE: 

  • Understanding of Design for Debug methodologies and DFD features work experience (e.g., Debug bus, Tracing, Trigger, Logic Analyzer, etc.) 
  • Experienced with Verilog, System Verilog and VCS simulation tool
  • Experience with Verilog RTL design and RTL quality sign-off tools
  • Pre-Silicon test planning & verification, engagement with Design teams
  • Knowledge & experience of low power concepts, clock gating, power gating is a plus
  • Experience in use of tools such as JTAG debuggers, logic analyzers, and PCIe bus analyzers
  • Debug test failures to determine the root cause; work with design engineers to resolve design defects and correct any test issues
  • Excellent communication skills and the ability to work in a worldwide team environment

ACADEMIC CREDENTIALS: 

  • Bachelor’s or Master’s degree in related discipline preferred

LOCATION: Austin, TX

 

 

 

 

 

#LI-TB2

#LI-HYBRID




At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: 

We are looking for an adaptive, self-motivated DFD engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The NBIO DFx team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

 

THE PERSON: 

Will have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

 

KEY RESPONSIBILITIES:

  • Definition and RTL Implementation of DFD architecture and features in NBIO IPs and Subsystems
  • Drive DFD features RTL integration and verification work
  • Thorough understanding of industry standard busses, such as PCIe, and other high-speed IO protocol is required in addition to detailed knowledge of high-speed digital design and signal integrity
  • Work with designers and Si debug teams to improve debuggability
  • Work with NBIO Debug and Emulation teams for common tools and scripts usage
  • Provide technical support to SoC and Post-Si teams to ensure successful bring up and enhance debug learning
  • Mentor and coach junior engineers

PREFERRED EXPERIENCE: 

  • Understanding of Design for Debug methodologies and DFD features work experience (e.g., Debug bus, Tracing, Trigger, Logic Analyzer, etc.) 
  • Experienced with Verilog, System Verilog and VCS simulation tool
  • Experience with Verilog RTL design and RTL quality sign-off tools
  • Pre-Silicon test planning & verification, engagement with Design teams
  • Knowledge & experience of low power concepts, clock gating, power gating is a plus
  • Experience in use of tools such as JTAG debuggers, logic analyzers, and PCIe bus analyzers
  • Debug test failures to determine the root cause; work with design engineers to resolve design defects and correct any test issues
  • Excellent communication skills and the ability to work in a worldwide team environment

ACADEMIC CREDENTIALS: 

  • Bachelor’s or Master’s degree in related discipline preferred

LOCATION: Austin, TX

 

 

 

 

 

#LI-TB2

#LI-HYBRID

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