Design Verification Engineer

Feb 01, 2024
Vancouver, Canada
... Not specified
... Intermediate
Full time
... Office work
Overview

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_


Responsibilities

THE ROLE

AMD is looking for motivated individuals seeking opportunities to solve complex problems in a fast-paced work environment.  Successful candidate will be involved in the microarchitectural design and RTL implementation of AMD’s PCI Express (PCIe) and Compute Express Link (CXL) IP used for our next-generation servers, clients, GPU, and Semi-custom products. The team works in a collaborative environment with IP and system architects to define cutting edge features and solutions to enable execution of AMD’s aggressive product roadmap.

 

THE PERSON:

  • Enjoys being in a collaborative environment where they can grow and learn with sense of pride
  • Strong analytical thinking and problem-solving skills with excellent attention to detail
  • Eager to learn new designs techniques and new protocols
  • Must have good communication and interpersonal skills

 

KEY RESPONSIBILITIES:

  • Microarchitectural design, documentation and RTL implementation of IP features.
  • Participate in design specification and RTL code reviews.
  • Collaborate with Design Verification team to execute on design features
  • Analyze RTL design for power optimization and timing optimization and CDC violations
  • Implement infrastructure to handle multitude of IP development and execution 

 

PREFERRED EXPERIENCE:

  • Digital design and RTL implementation
  • Synthesis and timing analysis to achieve timing closure
  • HDL (VHDL/Verilog), HVL (SystemVerilog) and SystemVerilog Assertions (SVA)
  • Design with multiple clock domains
  • Low power design and methodology
  • Makefile and other scripting languages like perl, python and ruby

 

 

ACADEMIC CREDENTIALS:

  • BS (or higher) degree in Electronics/Electrical or Computer Engineering desired

 

LOCATION:

Vancouver

 

 

 

 

#LI-TB2

#LI-HYBRID

 


Qualifications

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE

AMD is looking for motivated individuals seeking opportunities to solve complex problems in a fast-paced work environment.  Successful candidate will be involved in the microarchitectural design and RTL implementation of AMD’s PCI Express (PCIe) and Compute Express Link (CXL) IP used for our next-generation servers, clients, GPU, and Semi-custom products. The team works in a collaborative environment with IP and system architects to define cutting edge features and solutions to enable execution of AMD’s aggressive product roadmap.

 

THE PERSON:

  • Enjoys being in a collaborative environment where they can grow and learn with sense of pride
  • Strong analytical thinking and problem-solving skills with excellent attention to detail
  • Eager to learn new designs techniques and new protocols
  • Must have good communication and interpersonal skills

 

KEY RESPONSIBILITIES:

  • Microarchitectural design, documentation and RTL implementation of IP features.
  • Participate in design specification and RTL code reviews.
  • Collaborate with Design Verification team to execute on design features
  • Analyze RTL design for power optimization and timing optimization and CDC violations
  • Implement infrastructure to handle multitude of IP development and execution 

 

PREFERRED EXPERIENCE:

  • Digital design and RTL implementation
  • Synthesis and timing analysis to achieve timing closure
  • HDL (VHDL/Verilog), HVL (SystemVerilog) and SystemVerilog Assertions (SVA)
  • Design with multiple clock domains
  • Low power design and methodology
  • Makefile and other scripting languages like perl, python and ruby

 

 

ACADEMIC CREDENTIALS:

  • BS (or higher) degree in Electronics/Electrical or Computer Engineering desired

 

LOCATION:

Vancouver

 

 

 

 

#LI-TB2

#LI-HYBRID

 

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