DFT Verification Engineer

Mar 29, 2024
Vancouver, Canada
... Not specified
... Intermediate
Full time
... Office work

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

THE ROLE:

Work closely with the verification and design engineering community to verify the functional DFT architecture in the Graphics Core!

THE PERSON:

We are looking for a proven project leader with ability to effectively manage simultaneous design development activities and challenges including the skills to deploy sophisticated features across geo-distributed locations with varied project schedules. 

KEY RESPONSIBILITIES:  

  • Defining and executing verification test plans consisting of directed and random based test sets. Simulate tests to expose specification discrepancies
  • Evaluate and drive functional and coverage quality. Participate in silicon debug. Experience with hardware modeling, assertions and UVM methods are valuable assets  
  • Participate in development of verification infrastructure to meet the increasingly complex design needs within aggressive and market-driven schedules
  • Review and understand DFT architecture and functionality across the Graphics design
  • Define Design Verification requirements and test implementation specifics in verification plan
  • Construct System Verilog and/or C/C++ models and test sequence libraries for simulation
  • Build test bench components including agents, monitors, scoreboards for DUT
  • Compose tests, assertions, checkers, validation vectors and coverage bins to ensure verification completeness
  • Debug regression test failures to expose specification and implementation issues

PREFERRED EXPERIENCE:

  • Extensive ASIC/Custom design and testability experience
  • Strong background in C/C++ and Object Oriented programming
  • Experience with Verilog and/or System Verilog, with EDA simulation tools including Synopsys VCS, Cadence NCSIM, Verdi and with UVM, OVM or equivalent.
  • Experience with formal verification techniques and industry tools
  • Experience with scripting languages including Tcl/Perl/Ruby/Python
  • Working knowledge of Unix/Linux OS and debug tools
  • Strong analytical skills, attention to detail, excellent written and verbal communication along with strong interpersonal skills and proven leadership

 ACADEMIC CREDENTIALS:  

  • Bachelor of Science Degree in Electrical Engineering, Computer Science or Computer Engineering

 

#LI-TB1

#LI-Hybrid

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE:

Work closely with the verification and design engineering community to verify the functional DFT architecture in the Graphics Core!

THE PERSON:

We are looking for a proven project leader with ability to effectively manage simultaneous design development activities and challenges including the skills to deploy sophisticated features across geo-distributed locations with varied project schedules. 

KEY RESPONSIBILITIES:  

  • Defining and executing verification test plans consisting of directed and random based test sets. Simulate tests to expose specification discrepancies
  • Evaluate and drive functional and coverage quality. Participate in silicon debug. Experience with hardware modeling, assertions and UVM methods are valuable assets  
  • Participate in development of verification infrastructure to meet the increasingly complex design needs within aggressive and market-driven schedules
  • Review and understand DFT architecture and functionality across the Graphics design
  • Define Design Verification requirements and test implementation specifics in verification plan
  • Construct System Verilog and/or C/C++ models and test sequence libraries for simulation
  • Build test bench components including agents, monitors, scoreboards for DUT
  • Compose tests, assertions, checkers, validation vectors and coverage bins to ensure verification completeness
  • Debug regression test failures to expose specification and implementation issues

PREFERRED EXPERIENCE:

  • Extensive ASIC/Custom design and testability experience
  • Strong background in C/C++ and Object Oriented programming
  • Experience with Verilog and/or System Verilog, with EDA simulation tools including Synopsys VCS, Cadence NCSIM, Verdi and with UVM, OVM or equivalent.
  • Experience with formal verification techniques and industry tools
  • Experience with scripting languages including Tcl/Perl/Ruby/Python
  • Working knowledge of Unix/Linux OS and debug tools
  • Strong analytical skills, attention to detail, excellent written and verbal communication along with strong interpersonal skills and proven leadership

 ACADEMIC CREDENTIALS:  

  • Bachelor of Science Degree in Electrical Engineering, Computer Science or Computer Engineering

 

#LI-TB1

#LI-Hybrid

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