Director Silicon Design Engineering

Feb 15, 2024
Bengaluru, India
... Not specified
... Senior
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




THE ROLE (SOC Lead) :

  • Drive and lead end-to-end SOC execution with SOC teams on Design, DFT, Verification, Physical Design to drive execution from concept to tape-out.
  • Interface to System and SW engineering teams for successful product delivery to customer.
  • Drive SOC from concept to productization. Work with customer requirements on product definition, feature, bounding box analysis and drive optimal solution.
  • Work with business and design team on optimal development cost solution considering in die size, power, performance optimization.
  • Work with architecture team on high level arch and uArch definition.
  • Work with IP team for IP requirement, deliverables and negotiations.
  • Work with program management team for SOC planning, schedule, resource demand/supply, critical path analysis, dev cost and execution.
  • Work with SOC (Design, DFT, DV, PD), System and SW team to deliver next generation high performance SOC designs.
  • Work with post-Si team to drive Si bring up and ramp to productization.

 

THE PERSON:

  • Leader with strong self-driving ability and winning attitude.
  • Need excellent communication skills, both written and oral.
  • Strong interpersonal and stakeholders management skills.
  • Strong problem-solving skills.

 

KEY RESPONSIBILITIES:

  • Driving SOC cross-site execution from concept to tape-out and productization.
  • Contribute to Bounding box analysis, Design, DFT, Verification, Test-plan, Power Reduction, Timing Convergence & Floorplan, Tape-outs, System engineering and SW deliverables.
  • Running regular execution meetings, scrums, standing meetings and resolving bottlenecks.
  • Project planning, schedule, deliverables, risk/ mitigations. Presenting status update to senior executives.

 

PREFERRED EXPERIENCE:

  • Experience of successfully leading minimum 2 SOC execution from spec to tape-out and productization.
  • Expertise in SOC integration and implementation - IP Integration, SOC fabrics, Voltage / Clock domain crossings, DFT, Power intent design, RTL Quality checks, Clock, Reset, Fuses, Synthesis, Timing Analysis, Design Partitioning, PPA optimization, PnR, Timing analysis, Floorplan convergence, Physical design implementation and signoff.
  • Experience in ASIC execution, customer engagement, deliverables and execution flow.
  • Work with a team of Architects, Hardware and Software engineers to define the High-Level Architecture.
  • Strong hands-on experience in different SOC design activities, Verification aspects, Test plan review, Debug/triage, bottleneck resolution etc. Strong Problem Solving and Debugging Skills
  • Comfortable with design/implementation tools and flows like VCS, SOC Connectivity, Spyglass Lint/CDC/RDC, VCLP, Synthesis – DC/FC, ICC, and Physical design implementation/signoff tools.
  • Expertise in SOC architecture, System bus and IO protocol understanding (e.g. AXI, PCIe, Memory etc.)
  • Good understanding of System integration, multi-die methodology, packaging, yield, and system solution.
  • Experience in working with SW team for BIOS, FW, Driver, SW stack, QA and SW release is a plus.
  • Expertise in managing execution team, project planning, IP delivery timelines, deliverables and quality checks, Resource planning, critical path analysis, risks, and mitigation plan.
  • Comfort with Scripting such as Perl, shell, Python and TCL is a plus.

 

ACADEMIC CREDENTIALS:

  • ~20+ years of strong experience in leading end to end SOC and ASIC execution.
  • BE/B.Tech/ME/MTECH/MS or equivalent ECE/EEE

#LI-NF1




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE (SOC Lead) :

  • Drive and lead end-to-end SOC execution with SOC teams on Design, DFT, Verification, Physical Design to drive execution from concept to tape-out.
  • Interface to System and SW engineering teams for successful product delivery to customer.
  • Drive SOC from concept to productization. Work with customer requirements on product definition, feature, bounding box analysis and drive optimal solution.
  • Work with business and design team on optimal development cost solution considering in die size, power, performance optimization.
  • Work with architecture team on high level arch and uArch definition.
  • Work with IP team for IP requirement, deliverables and negotiations.
  • Work with program management team for SOC planning, schedule, resource demand/supply, critical path analysis, dev cost and execution.
  • Work with SOC (Design, DFT, DV, PD), System and SW team to deliver next generation high performance SOC designs.
  • Work with post-Si team to drive Si bring up and ramp to productization.

 

THE PERSON:

  • Leader with strong self-driving ability and winning attitude.
  • Need excellent communication skills, both written and oral.
  • Strong interpersonal and stakeholders management skills.
  • Strong problem-solving skills.

 

KEY RESPONSIBILITIES:

  • Driving SOC cross-site execution from concept to tape-out and productization.
  • Contribute to Bounding box analysis, Design, DFT, Verification, Test-plan, Power Reduction, Timing Convergence & Floorplan, Tape-outs, System engineering and SW deliverables.
  • Running regular execution meetings, scrums, standing meetings and resolving bottlenecks.
  • Project planning, schedule, deliverables, risk/ mitigations. Presenting status update to senior executives.

 

PREFERRED EXPERIENCE:

  • Experience of successfully leading minimum 2 SOC execution from spec to tape-out and productization.
  • Expertise in SOC integration and implementation - IP Integration, SOC fabrics, Voltage / Clock domain crossings, DFT, Power intent design, RTL Quality checks, Clock, Reset, Fuses, Synthesis, Timing Analysis, Design Partitioning, PPA optimization, PnR, Timing analysis, Floorplan convergence, Physical design implementation and signoff.
  • Experience in ASIC execution, customer engagement, deliverables and execution flow.
  • Work with a team of Architects, Hardware and Software engineers to define the High-Level Architecture.
  • Strong hands-on experience in different SOC design activities, Verification aspects, Test plan review, Debug/triage, bottleneck resolution etc. Strong Problem Solving and Debugging Skills
  • Comfortable with design/implementation tools and flows like VCS, SOC Connectivity, Spyglass Lint/CDC/RDC, VCLP, Synthesis – DC/FC, ICC, and Physical design implementation/signoff tools.
  • Expertise in SOC architecture, System bus and IO protocol understanding (e.g. AXI, PCIe, Memory etc.)
  • Good understanding of System integration, multi-die methodology, packaging, yield, and system solution.
  • Experience in working with SW team for BIOS, FW, Driver, SW stack, QA and SW release is a plus.
  • Expertise in managing execution team, project planning, IP delivery timelines, deliverables and quality checks, Resource planning, critical path analysis, risks, and mitigation plan.
  • Comfort with Scripting such as Perl, shell, Python and TCL is a plus.

 

ACADEMIC CREDENTIALS:

  • ~20+ years of strong experience in leading end to end SOC and ASIC execution.
  • BE/B.Tech/ME/MTECH/MS or equivalent ECE/EEE

#LI-NF1

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