Display IP Design Manager

May 23, 2024
Markham, Canada
... Not specified
... Intermediate
Full time
... Office work

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We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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THE ROLE:

The Display team within the GPU Technologies & Engineering(G&E) is hiring an Display IP Design Manager for the Display HUB blocks!  The design is engineered to deliver efficient real time memory accesses to the display memory surfaces adhering to strict product power, performance and area metrics.   

 

THE PERSON:

This is a unique opportunity for an experienced Leader to command a skilled team of Design and Verification Engineers to deliver solutions across AMD's dGPU, APU and Semi-custom business units.   As a hands on Manager, you will be working with industry established top talents in the Display and Memory subsystem fields.   A successful candidate should demonstrate experience leading large IP developments, motivated to meet program goals with a high quality bar and show solid technical decision making skills.   Leadership experience should span across the full IP development phases - planning, architecture, design, verification, signoff and post silicon activities.    

  • Experience in technical management with a team size of 8 or more people
  • Strong leader with experience working with a distributed team.
  • Strong mentoring and coaching skills.
  • Excellent written and oral communication skills. 
  • Must be a self-starter and self-motivated

KEY RESPONSIBILITIES

  • Lead a high performing Engineering team of design and verification professionals.
  • Project planning and execution with the team to meet AMD business goals.
  • Deliver to and define custom quality metrics for the IP.
  • Collaborate with multi-functional talents and teams to drive AMD's success
  • Challenge experienced team members and grow junior talents.

 

PREFERRED EXPERIENCE:

  • RTL design experience on large ASIC development projects
  • Experience in IP project execution.
  • Background with IP design and verification infrastructure/techniques

 

ACADEMIC CREDENTIALS:

  • Bachelor's degree required. Bachelor of Science Degree in Electrical Engineering, Computer Science or Computer Engineering preferred.  

 

LOCATION:

  • Markham, CAN or Greater Toronto, CAN area

#LI-BM1

#LI-Hybrid

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE:

The Display team within the GPU Technologies & Engineering(G&E) is hiring an Display IP Design Manager for the Display HUB blocks!  The design is engineered to deliver efficient real time memory accesses to the display memory surfaces adhering to strict product power, performance and area metrics.   

 

THE PERSON:

This is a unique opportunity for an experienced Leader to command a skilled team of Design and Verification Engineers to deliver solutions across AMD's dGPU, APU and Semi-custom business units.   As a hands on Manager, you will be working with industry established top talents in the Display and Memory subsystem fields.   A successful candidate should demonstrate experience leading large IP developments, motivated to meet program goals with a high quality bar and show solid technical decision making skills.   Leadership experience should span across the full IP development phases - planning, architecture, design, verification, signoff and post silicon activities.    

  • Experience in technical management with a team size of 8 or more people
  • Strong leader with experience working with a distributed team.
  • Strong mentoring and coaching skills.
  • Excellent written and oral communication skills. 
  • Must be a self-starter and self-motivated

KEY RESPONSIBILITIES

  • Lead a high performing Engineering team of design and verification professionals.
  • Project planning and execution with the team to meet AMD business goals.
  • Deliver to and define custom quality metrics for the IP.
  • Collaborate with multi-functional talents and teams to drive AMD's success
  • Challenge experienced team members and grow junior talents.

 

PREFERRED EXPERIENCE:

  • RTL design experience on large ASIC development projects
  • Experience in IP project execution.
  • Background with IP design and verification infrastructure/techniques

 

ACADEMIC CREDENTIALS:

  • Bachelor's degree required. Bachelor of Science Degree in Electrical Engineering, Computer Science or Computer Engineering preferred.  

 

LOCATION:

  • Markham, CAN or Greater Toronto, CAN area

#LI-BM1

#LI-Hybrid

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