DV Manager

Oct 03, 2024
Markham, Canada
... Not specified
... Intermediate
Full time
... Office work

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

About the department

Central DFX (CDFX) is a centralized ASIC design group within AMD’s Technology and Engineering organization.  CDFX has a global footprint with design teams located in several AMD offices in North America and Asia.

THE ROLE: 

On a day-to-day basis, this role is responsible for leading a staff that is responsible for DFX design methodology and CAD automation tools development to support the global DFX engineering teams across AMD. The mandate is to optimize and standardize design methodology, design and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for complex state-of-the-art APU computing, game console and GPU graphics products. 

THE PERSON: 

You are looking to help Lead and Manage a team that will excel in the niche field of ASIC design where essential functionality is added to support semiconductor productization including manufacturing test, yield improvement and board debug. You are seeking to be a key leader and contributor in delivering a high-quality design and improve AMD’s operating expenses in the millions.

KEY RESPONSIBILITIES: 

  • Team Leadership: Lead and mentor a team of design verification engineers, fostering a culture of innovation, collaboration, and continuous improvement.
  • Verification Strategy: Develop and execute comprehensive verification strategies for highly complex semiconductor designs, ensuring thorough coverage of functional requirements and compliance with industry standards.
  • Project Management: Define project plans, schedules, and resource allocations, effectively managing priorities and dependencies to meet aggressive product development timelines.
  • Cross-functional Collaboration: Collaborate closely with design, architecture, and software teams to drive alignment on verification goals, resolve technical challenges, and ensure successful product tape-outs.
  • Methodology Development: Drive the adoption and evolution of state-of-the-art verification methodologies, tools, and best practices to enhance efficiency, scalability, and quality.
  • Quality Assurance: Establish and enforce rigorous quality assurance processes and metrics, conducting reviews and audits to identify and mitigate risks throughout the verification lifecycle.
  • Continuous Improvement: Promote a culture of continuous improvement, proactively identifying opportunities to streamline workflows, optimize processes, and enhance team productivity.

PREFERRED EXPERIENCE: 

  • A strong leader with experience managing a distributed team  
  • Strong mentoring and coaching skills 
  • Strong project management skills with proven track record on design project execution on complex silicon products
  • Experience with UVM, System Verilog, C++, Test bench development, Coverage analysis
  • Experience integrating RTL and Software solutions from IP to system level
  • Strong communications skills. Able to summarize complex problems for executives as well as drill down to details with architects and engineers 
  • Strong analytic and problem-solving skills including the ability to analyze current behavior, identify potential areas for improvement and design of experiments 
  • Must be a self-starter and self-motivated 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering preferred

LOCATION: Markham, ON

 

#LI-MR1

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

About the department

Central DFX (CDFX) is a centralized ASIC design group within AMD’s Technology and Engineering organization.  CDFX has a global footprint with design teams located in several AMD offices in North America and Asia.

THE ROLE: 

On a day-to-day basis, this role is responsible for leading a staff that is responsible for DFX design methodology and CAD automation tools development to support the global DFX engineering teams across AMD. The mandate is to optimize and standardize design methodology, design and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for complex state-of-the-art APU computing, game console and GPU graphics products. 

THE PERSON: 

You are looking to help Lead and Manage a team that will excel in the niche field of ASIC design where essential functionality is added to support semiconductor productization including manufacturing test, yield improvement and board debug. You are seeking to be a key leader and contributor in delivering a high-quality design and improve AMD’s operating expenses in the millions.

KEY RESPONSIBILITIES: 

  • Team Leadership: Lead and mentor a team of design verification engineers, fostering a culture of innovation, collaboration, and continuous improvement.
  • Verification Strategy: Develop and execute comprehensive verification strategies for highly complex semiconductor designs, ensuring thorough coverage of functional requirements and compliance with industry standards.
  • Project Management: Define project plans, schedules, and resource allocations, effectively managing priorities and dependencies to meet aggressive product development timelines.
  • Cross-functional Collaboration: Collaborate closely with design, architecture, and software teams to drive alignment on verification goals, resolve technical challenges, and ensure successful product tape-outs.
  • Methodology Development: Drive the adoption and evolution of state-of-the-art verification methodologies, tools, and best practices to enhance efficiency, scalability, and quality.
  • Quality Assurance: Establish and enforce rigorous quality assurance processes and metrics, conducting reviews and audits to identify and mitigate risks throughout the verification lifecycle.
  • Continuous Improvement: Promote a culture of continuous improvement, proactively identifying opportunities to streamline workflows, optimize processes, and enhance team productivity.

PREFERRED EXPERIENCE: 

  • A strong leader with experience managing a distributed team  
  • Strong mentoring and coaching skills 
  • Strong project management skills with proven track record on design project execution on complex silicon products
  • Experience with UVM, System Verilog, C++, Test bench development, Coverage analysis
  • Experience integrating RTL and Software solutions from IP to system level
  • Strong communications skills. Able to summarize complex problems for executives as well as drill down to details with architects and engineers 
  • Strong analytic and problem-solving skills including the ability to analyze current behavior, identify potential areas for improvement and design of experiments 
  • Must be a self-starter and self-motivated 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering preferred

LOCATION: Markham, ON

 

#LI-MR1

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