EMIR/Power SMTS Silicon Design Engineer

Sep 18, 2024
Bengaluru, India
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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SMTS SILICON DESIGN ENGINEER

THE ROLE: 

As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs.As a member of the Power Delivery convergence team , you will work closely with the architecture, physical design teams, package, board, and product engineers to achieve first pass silicon success.

THE PERSON:

A successful candidate will work on full chip SoC electrical signoff convergence with physical design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBLITIES:

  • Drive full chip IR/EM convergence on multiple ASICs across different technology nodes.
  • Work closely with architecture, power management, package and floorplan team to come up with robust power delivery design.
  • Work with RTL and PD team in coming up with the low power and UPF specification for the SoC.
  • Work closely with CAD team to come up with new flows and methodologies in the power integrity domain.


PREFERRED SKILLSET:

  • 15+ years of professional experience in the industry with a proven track record of successfully delivering complex SoCs
  • Sound knowledge of Power delivery and power integrity domains
  • Hands on experience on industry standard tools especially Redhawk based power integrity analysis
  • Should have lead IR/EM convergence on full chip SoCs
  • Good in scripting languages such as Tcl and Perl
  • Self driven, positive attitude and team worker

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in Electronics/Electrical Engineering 

 

#LI-SR4




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS SILICON DESIGN ENGINEER

THE ROLE: 

As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs.As a member of the Power Delivery convergence team , you will work closely with the architecture, physical design teams, package, board, and product engineers to achieve first pass silicon success.

THE PERSON:

A successful candidate will work on full chip SoC electrical signoff convergence with physical design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBLITIES:

  • Drive full chip IR/EM convergence on multiple ASICs across different technology nodes.
  • Work closely with architecture, power management, package and floorplan team to come up with robust power delivery design.
  • Work with RTL and PD team in coming up with the low power and UPF specification for the SoC.
  • Work closely with CAD team to come up with new flows and methodologies in the power integrity domain.


PREFERRED SKILLSET:

  • 15+ years of professional experience in the industry with a proven track record of successfully delivering complex SoCs
  • Sound knowledge of Power delivery and power integrity domains
  • Hands on experience on industry standard tools especially Redhawk based power integrity analysis
  • Should have lead IR/EM convergence on full chip SoCs
  • Good in scripting languages such as Tcl and Perl
  • Self driven, positive attitude and team worker

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in Electronics/Electrical Engineering 

 

#LI-SR4

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