FPGA Engineer

Feb 07, 2024
San Jose, United States
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




THE ROLE: 

In this role you will help create leading edge PCIe technologies used in a wide variety of applications. The focus of this role is to design, plan and execute system level solutions with new and existing PCIe technology and solutions for programmable silicon at AMD. Key development includes PCIe technologies for PCIe Gen 6, CXL, TDISP, IDE, PCIe in-line DMA and other leading-edge products.  

 

THE PERSON: 

You have a passion for modern, complex processor architecture, digital design, and validation in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

 

KEY RESPONSIBILITIES: 

  • Develop system level solutions using next generation PCIe, CXL and connectivity solutions to power datacenter, acceleration, communications, T&M markets.
  • Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization including but not limited to architecture, design, and documentation for IPs.
  • Develop comprehensive testing plans including Compliance and Interop testing. Critically review and provide feedback on the Design Implementations and Verification plans.
  • Responsible for IP design, Silicon bring up, Validation and IP release
  • Work in collaboration with the Global teams

 

PREFERRED EXPERIENCE: 

  • Strong knowledge in RTL coding
  • Knowledge of high-speed interfaces including, PCIe, CXL, Ethernet, DDR3/4/5, LPDDR3/4, HBM, AMBA AXI/AHB/APB protocol
  • Experience in developing system or IP prototypes using FPGAs.
  • Strong knowledge of IP/SOC design methodologies
  • Experience advocating for technical solutions in a collaborative team environment.
  • Excellent communication and collaboration skills

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

LOCATION: San Jose, CA 

 

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: 

In this role you will help create leading edge PCIe technologies used in a wide variety of applications. The focus of this role is to design, plan and execute system level solutions with new and existing PCIe technology and solutions for programmable silicon at AMD. Key development includes PCIe technologies for PCIe Gen 6, CXL, TDISP, IDE, PCIe in-line DMA and other leading-edge products.  

 

THE PERSON: 

You have a passion for modern, complex processor architecture, digital design, and validation in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

 

KEY RESPONSIBILITIES: 

  • Develop system level solutions using next generation PCIe, CXL and connectivity solutions to power datacenter, acceleration, communications, T&M markets.
  • Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization including but not limited to architecture, design, and documentation for IPs.
  • Develop comprehensive testing plans including Compliance and Interop testing. Critically review and provide feedback on the Design Implementations and Verification plans.
  • Responsible for IP design, Silicon bring up, Validation and IP release
  • Work in collaboration with the Global teams

 

PREFERRED EXPERIENCE: 

  • Strong knowledge in RTL coding
  • Knowledge of high-speed interfaces including, PCIe, CXL, Ethernet, DDR3/4/5, LPDDR3/4, HBM, AMBA AXI/AHB/APB protocol
  • Experience in developing system or IP prototypes using FPGAs.
  • Strong knowledge of IP/SOC design methodologies
  • Experience advocating for technical solutions in a collaborative team environment.
  • Excellent communication and collaboration skills

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

LOCATION: San Jose, CA 

 

#LI-DW1

#HYBRID

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