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AMD is looking for a FPGA/RTL Engineer with knowledge of HW/SW system design and methodology to help boost customer productivity and design performance across current Xilinx platforms and the industry's first adaptive compute acceleration platform Versal ACAP (7nm). Versal devices combine processors, programmable logic (FPGA) and new AI engines to deliver powerful heterogeneous acceleration for any application.

The FPGA/RTL Engineer  position is in the Interactive Design Tools and FPGA compilation applications team, located in Edinburgh/Dublin for a skilled and self-motivated engineer to focus on design tools specification, early validation, training, documentation and key customer support. The successful candidate will work closely with several Xilinx software R&D teams, including IP, infrastructure, flow and GUI to improve the Vivado design entry experience and to enable higher productivity for the next generation of designs across markets (5G, communication, test, acceleration, machine learning) and Xilinx devices.

Daily activities will include the following duties:

• Assist with defining design tool specifications and propose creative solutions for future FPGA and ACAP SoC devices support or to solve existing persistent and pervasive customer issues
• Adopt proper design methodology, and illustrate best practices via examples, tutorials and demos based on a diversity of HW designs and latest tool releases
• Explore critical tool issues seen by customers and help identify workarounds and future enhancements
• Track, prioritize, and assign reported tool issues to the appropriate engineering teams
• Participate in cross functional meetings with other engineering, marketing and quality teams to ensure issues are resolved efficiently
• Assist with solving customer escalations. Coordinate communication between teams, brainstorm creative solutions and thoroughly test them. Clearly communicate our recommended solution and the timeframe in which it will be delivered
• Work closely with IP design teams to enhance their integration in Xilinx tools ecosystem while complying with recommended flows and methodologies
• Author simple documentation tuned to the needs of the reader for their areas of expertise
• Continuously learn about complimentary Xilinx technologies, such as Vitis, HLS, System SW, Alveo boards
• Stay current with and proposing the internal use of industry approaches, algorithms, and practices

Education

• MS or equivalent work experience in Electrical Engineering or similar technology area, with minimum 2 years of relevant experience.

Preferred skills and experience

• Customer Awareness: Has working knowledge of system design flows and expectations
• Product Knowledge: Has working knowledge of FPGA or ASIC design processes, tools and flows, and has exposure to AXI protocols, system software dependencies, and Linux. Has hands-on experience with HDL, Tcl (or Python), physical implementation flows and verification tools
• Design Enablement: Experience with verification methodologies, and demo creation
• Problem Solving: Assist with solving system level issues, internally and with tier-1 customers
• Technical Communication: Can simplify and communicate complex subjects, by articulating options, trade-offs, and clarifying potential usability impacts

#LI-DS3

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD is looking for a FPGA/RTL Engineer with knowledge of HW/SW system design and methodology to help boost customer productivity and design performance across current Xilinx platforms and the industry's first adaptive compute acceleration platform Versal ACAP (7nm). Versal devices combine processors, programmable logic (FPGA) and new AI engines to deliver powerful heterogeneous acceleration for any application.

The FPGA/RTL Engineer  position is in the Interactive Design Tools and FPGA compilation applications team, located in Edinburgh/Dublin for a skilled and self-motivated engineer to focus on design tools specification, early validation, training, documentation and key customer support. The successful candidate will work closely with several Xilinx software R&D teams, including IP, infrastructure, flow and GUI to improve the Vivado design entry experience and to enable higher productivity for the next generation of designs across markets (5G, communication, test, acceleration, machine learning) and Xilinx devices.

Daily activities will include the following duties:

• Assist with defining design tool specifications and propose creative solutions for future FPGA and ACAP SoC devices support or to solve existing persistent and pervasive customer issues
• Adopt proper design methodology, and illustrate best practices via examples, tutorials and demos based on a diversity of HW designs and latest tool releases
• Explore critical tool issues seen by customers and help identify workarounds and future enhancements
• Track, prioritize, and assign reported tool issues to the appropriate engineering teams
• Participate in cross functional meetings with other engineering, marketing and quality teams to ensure issues are resolved efficiently
• Assist with solving customer escalations. Coordinate communication between teams, brainstorm creative solutions and thoroughly test them. Clearly communicate our recommended solution and the timeframe in which it will be delivered
• Work closely with IP design teams to enhance their integration in Xilinx tools ecosystem while complying with recommended flows and methodologies
• Author simple documentation tuned to the needs of the reader for their areas of expertise
• Continuously learn about complimentary Xilinx technologies, such as Vitis, HLS, System SW, Alveo boards
• Stay current with and proposing the internal use of industry approaches, algorithms, and practices

Education

• MS or equivalent work experience in Electrical Engineering or similar technology area, with minimum 2 years of relevant experience.

Preferred skills and experience

• Customer Awareness: Has working knowledge of system design flows and expectations
• Product Knowledge: Has working knowledge of FPGA or ASIC design processes, tools and flows, and has exposure to AXI protocols, system software dependencies, and Linux. Has hands-on experience with HDL, Tcl (or Python), physical implementation flows and verification tools
• Design Enablement: Experience with verification methodologies, and demo creation
• Problem Solving: Assist with solving system level issues, internally and with tier-1 customers
• Technical Communication: Can simplify and communicate complex subjects, by articulating options, trade-offs, and clarifying potential usability impacts

#LI-DS3