WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

AMD together we advance_

MTS SILICON DESIGN ENGINEER  

THE ROLE: 

AMD is seeking a capable and motivated front-end power engineer to fill a technical leadership role in front-end design team of next generation AI Engine/ML silicon. You will take part in microarchitecture and design of high-performance, low-power processor and accelerator IP for AI/ML applications.

THE PERSON: 

Successful candidate would have strong experience in ASIC power analysis methodology with ASIC Design background.

KEY RESPONSIBILITIES: 

• Drive energy efficient RTL design and micro-architecture of AI/ML silicon
• Develop power analysis methodology that can provide early power estimation for AI Engine IP
• Establish PPA tracking, power analysis and data collection for all AI Engine architectures  
• Define power vectors using various data type and estimate power using power analysis tools
• ASIC power estimation and modeling with feedback from silicon, create accurate early-stage power model using pre-silicon simulation for post-silicon power correlation
• Work with architecture, verification and RTL design, and Physical Design team to address any power-related issue
• Extend EDA tools to build strong power analysis methodology to achieve PPA improvements

PREFERRED EXPERIENCE: 

• Knowledge of Low power digital design and power analysis and reduction techniques for energy efficiency (Perf/Watt)
• Experience in ASIC design flow and EDA tools experience such as VCS, Verdi, PrimePower/PTPX, PowerArtist or other power analysis/simulation tools
• Experience in SystemC, Early power modeling, TCL, Perl, Python with numpy, scikit-learn
• Complex Problem-solving skill, Strong verbal and written communication skills
• Understanding of FPGA architecture and implementation flow
• Experience in working with Linux environment, Version control systems such as Perforce, ICManage or Git

Education Requirements

• Bachelors or Masters degree in computer engineering/Electrical Engineering 
• #LI-SR5

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

MTS SILICON DESIGN ENGINEER  

THE ROLE: 

AMD is seeking a capable and motivated front-end power engineer to fill a technical leadership role in front-end design team of next generation AI Engine/ML silicon. You will take part in microarchitecture and design of high-performance, low-power processor and accelerator IP for AI/ML applications.

THE PERSON: 

Successful candidate would have strong experience in ASIC power analysis methodology with ASIC Design background.

KEY RESPONSIBILITIES: 

• Drive energy efficient RTL design and micro-architecture of AI/ML silicon
• Develop power analysis methodology that can provide early power estimation for AI Engine IP
• Establish PPA tracking, power analysis and data collection for all AI Engine architectures  
• Define power vectors using various data type and estimate power using power analysis tools
• ASIC power estimation and modeling with feedback from silicon, create accurate early-stage power model using pre-silicon simulation for post-silicon power correlation
• Work with architecture, verification and RTL design, and Physical Design team to address any power-related issue
• Extend EDA tools to build strong power analysis methodology to achieve PPA improvements

PREFERRED EXPERIENCE: 

• Knowledge of Low power digital design and power analysis and reduction techniques for energy efficiency (Perf/Watt)
• Experience in ASIC design flow and EDA tools experience such as VCS, Verdi, PrimePower/PTPX, PowerArtist or other power analysis/simulation tools
• Experience in SystemC, Early power modeling, TCL, Perl, Python with numpy, scikit-learn
• Complex Problem-solving skill, Strong verbal and written communication skills
• Understanding of FPGA architecture and implementation flow
• Experience in working with Linux environment, Version control systems such as Perforce, ICManage or Git

Education Requirements

• Bachelors or Masters degree in computer engineering/Electrical Engineering 
• #LI-SR5