WHAT YOU DO AT AMD CHANGES EVERYTHING

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The Role:
As an ASIC Design Engineer on our Control Fabric Subsystem Team, you will develop and verify of System on Chip secure boot and SoC initialization embedded firmware. Because our group owns digital hardware verification and embedded software debug, you will improve your skills direct and detailed exposure to SoC initialization, hardware and software security and computer architecture through development of the secure boot and initialization firmware

The Person:

A motivated engineer with a background in computer architecture and system architecture. A desire to build technical ability in both HW and SW development as well as design verification skills. Strong interpersonal and communication skills to work well with our SoC integration and SoC DV teams. High analytical and problem solving skills with close attention to details.

Key Responsibilities:

• Develop and verify embedded firmware for SOC boot, SOC initialization and embedded microprocessor driven hardware acceleration services such as large scale DMA, boot media management etc. using Hardware/Firmware co-verification in UVM System Verilog and C-DPI structured testbench and also an FPGA hardware prototype platform
• Code scripts and create infrastructure methodologies for the modification, compilation, and verification of embedded SOC boot firmware
• Build test plans and drive verification and debug of embedded boot firmware functionality to complete functional test and code coverage goals
• Develop and modify the System Verilog and C driven testbench and bus functional models as required.
• Participate in subsystem specification, influence IP micro-architecture development (HW and FW co-design and verification aspect), develop and verify abstracted performance models
• Develop and execute subsystem and block level tests using FW/HW co-verification methodology
• Improve verification metrics
• Work on SW based abstracted and RTL hybrid models to achieve regressions and coverage
• Integartion RTL HW IPs and verify

Preferred Experience:

• Proven experience in FW and HW design or verification
• Solid understanding of software development and debug
• Proficient in object oriented programming, scripting, and low-level programming languages
• Knowledge about UVM methodology and C-DPI methodology
• Excellent knowledge about standard bus/interface protocols (i.e. AXI, AHB, AMBA)
• Excellent experience with firmware design on commercial microprocessors; microprocessor tool chain, compiler, assembler, debugger; and ASIC verification tools, simulation, linting, power aware simulation, etc.

Academic Credentials:

• Major in Electrical or Computer Engineering.
• Master’s or PhD Degree preferred.

Location: Austin, TX

#LI-CC3

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

The Role:
As an ASIC Design Engineer on our Control Fabric Subsystem Team, you will develop and verify of System on Chip secure boot and SoC initialization embedded firmware. Because our group owns digital hardware verification and embedded software debug, you will improve your skills direct and detailed exposure to SoC initialization, hardware and software security and computer architecture through development of the secure boot and initialization firmware

The Person:

A motivated engineer with a background in computer architecture and system architecture. A desire to build technical ability in both HW and SW development as well as design verification skills. Strong interpersonal and communication skills to work well with our SoC integration and SoC DV teams. High analytical and problem solving skills with close attention to details.

Key Responsibilities:

• Develop and verify embedded firmware for SOC boot, SOC initialization and embedded microprocessor driven hardware acceleration services such as large scale DMA, boot media management etc. using Hardware/Firmware co-verification in UVM System Verilog and C-DPI structured testbench and also an FPGA hardware prototype platform
• Code scripts and create infrastructure methodologies for the modification, compilation, and verification of embedded SOC boot firmware
• Build test plans and drive verification and debug of embedded boot firmware functionality to complete functional test and code coverage goals
• Develop and modify the System Verilog and C driven testbench and bus functional models as required.
• Participate in subsystem specification, influence IP micro-architecture development (HW and FW co-design and verification aspect), develop and verify abstracted performance models
• Develop and execute subsystem and block level tests using FW/HW co-verification methodology
• Improve verification metrics
• Work on SW based abstracted and RTL hybrid models to achieve regressions and coverage
• Integartion RTL HW IPs and verify

Preferred Experience:

• Proven experience in FW and HW design or verification
• Solid understanding of software development and debug
• Proficient in object oriented programming, scripting, and low-level programming languages
• Knowledge about UVM methodology and C-DPI methodology
• Excellent knowledge about standard bus/interface protocols (i.e. AXI, AHB, AMBA)
• Excellent experience with firmware design on commercial microprocessors; microprocessor tool chain, compiler, assembler, debugger; and ASIC verification tools, simulation, linting, power aware simulation, etc.

Academic Credentials:

• Major in Electrical or Computer Engineering.
• Master’s or PhD Degree preferred.

Location: Austin, TX

#LI-CC3