I/O Performance Architecture Lead - 164121
What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
AMD is seeking an experienced I/O Performance Architecture Lead to drive best-in-class I/O performance for AMD processors and accellerators, from pre-silicon IP subsystem and IP multisubsystem architecture and design, through to post-silicon performance optimization at the platform level.
The role is heavily focused on determining requirements and performance targets for RTL design teams by selecting use cases, analyzing work loads and identifying and isolating potential performance bottlenecks, and proposing design and architectural changes to facilitate AMD's competitive positioning with respect to high-speed I/O.
As a member of the I/O Architecture team, the successful candidate would provide guidance and feedback to IP RTL design teams, performance modeling teams, multi-subsystem and SoC performance verification teams, and post-silicon performance validation and optimization teams, and leverage existing RTL designs, and performance models to inform future architectural decisions, drive performance optimization initiatives across team boundaries, and when called on, communicate with corporate-wide technical leadership and/or key customers.
- Determine and articulate I/O performance goals, strategy, and methodology
- Specify and maintain per-project I/O performance bounding box, workloads, topology, and bandwidth, QoS, and latency targets
- Define and drive performance features into product plans
- Influence on critical RTL structure sizing requirements in the IP
- Propose and oversee architectural case studies involving existing silicon, RTL and/or performance models
- Review Performance Verification test plans (IP, Multi-subsystem, and SoC, as applicable)
- Support performance debugging in simulation and post-silicon
- Investigate performance results from regressions and interpret findings for follow-up actions
- Analyze trace captures from post-silicon application workloads
- Interface with SoC and IP Architects, Performance Verification Leads, and in various Performance Working Groups
- Provide direction to performance model development
- Communicate openly and clearly in meetings, presentations, emails, and reports to engineering and engineering management
- PC System Architecture and I/O Connectivity Protocols: PCI Express, CXL
- On-Chip Bus Interfaces and Architectures
- I/O Virtualization (x86, ARM)
EDUCATION AND EXPERIENCE:
- Bachelor's or Master's Degree in Electrical and Computer Engineering, and 5 to 15 years transferrable industry and/or research experience
Requisition Number: 164121
Country/Region/Location:Ireland City:Dublin/Cork - Hybrid Model
Job Function: I/O Performance Architecture Lead
Hiring Manager: Joel Wilke