WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

SMTS SILICON DESIGN ENGINEER

Join the exciting and growing world of Server business and be a critical member of the AMD team that plays a significant role in defining and delivering the next generation of EPYC processors

Primary Responsibilities:

• Work closely with the DFT Architecture and Design team to understand the implementation and come up with the validation strategy
• Lead the complete DFT DV activities for the program and own validating the DFT logic and providing patterns to the Product Engineering team
• Create a comprehensive testplan and get it reviewed with Arch/Design team
• Create TB and the required Checkers/Scoreboard
• Own the DFT DV sign-off  and ensure a bug free design
• Collaborate with the Arch, Design, Functional DV, Emulation, Platform Debug, etc teams to comprehend and validate all the usage models
• Work with the post-silicon team on debug support and to help root-cause any failures

Requirements:

• 10+ years of Design Verification experience with strong Verilog, System Verilog, C++ and UVM/OVM knowledge
• Good understanding and exposure to SoC design and architecture
• Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects
• Ability to come with detailed testplan based on the Arch specs
• Exposure to DFT concepts such as JTAG, SCAN, MBIST, BScan, etc
• Comfortable with VCS/Verdi and excellent debug skills
• Logical in thinking and ability to gel well within a team and be a proactive member of the team.
• Good communication and leadership skills

Qualification:

• B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering with >10 years of experience in IP/SoC level DV

#LI-NS1

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS SILICON DESIGN ENGINEER

Join the exciting and growing world of Server business and be a critical member of the AMD team that plays a significant role in defining and delivering the next generation of EPYC processors

Primary Responsibilities:

• Work closely with the DFT Architecture and Design team to understand the implementation and come up with the validation strategy
• Lead the complete DFT DV activities for the program and own validating the DFT logic and providing patterns to the Product Engineering team
• Create a comprehensive testplan and get it reviewed with Arch/Design team
• Create TB and the required Checkers/Scoreboard
• Own the DFT DV sign-off  and ensure a bug free design
• Collaborate with the Arch, Design, Functional DV, Emulation, Platform Debug, etc teams to comprehend and validate all the usage models
• Work with the post-silicon team on debug support and to help root-cause any failures

Requirements:

• 10+ years of Design Verification experience with strong Verilog, System Verilog, C++ and UVM/OVM knowledge
• Good understanding and exposure to SoC design and architecture
• Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects
• Ability to come with detailed testplan based on the Arch specs
• Exposure to DFT concepts such as JTAG, SCAN, MBIST, BScan, etc
• Comfortable with VCS/Verdi and excellent debug skills
• Logical in thinking and ability to gel well within a team and be a proactive member of the team.
• Good communication and leadership skills

Qualification:

• B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering with >10 years of experience in IP/SoC level DV

#LI-NS1