WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

MANAGER – SILICON DESIGN ENGINEER  

• Technical Expertise :

Fair understanding of Processor based SoC Design Verification is required.

Prior work experience of working on PCIe/CXL/USB/SATA IP's at IP Level or Sub-System Level Verification is a plus.

Strong background of MIPS/X86/ARM Processor based IP/Sub-System Level Verification is desired.

Know-How about SOC Micro-Arch flows (Reset, Boot flow, Cache/Coherency, System Memory) is desired.

• Testbench Expertise :

Good understanding on Testbench Concepts, strong hands-on expertise in SV/UVM is must.

Developing and improving SV/UVM based testbench for functional verification of Processor and its components.

IP/Sub-System Verification background with Processor based Testbench is a must.

Good debugging skills using Simulator Waveform/Trace logs is required.

Prior exposure of working with any ISA simulator model based verification is a plus.

• Protocols :

Fair understanding on protocols : AXI3/ACE/CHI is must.

Prior work experience on High-Speed Serials - PCIe/CXL/USB/SATA/GT IP's is preferred.

• People Skills :
  • Self-motivated and adaptable to fast-moving design verification environment.
  • Willing to take up additional responsibilities to contribute to the team’s success.
• Role and Responsibilities :
  • Will be part of Server SOC Verification Team working at AMD Hyderabad/ Bangalore, India.
  • Responsible for Developing testbench components for SOC Design Verification.
  • Writing/Enhancing BFM/Checkers/Monitors/Other-SOC Verif Env's.
  • Bringing up Testbench with comprehensive verification plan and implementation of test cases.
  • Work with a cross geographic teams, IP/SOC-Architects, Design Verification Stakeholders, ensure required Verif Env exists for verifying Design of Next-Gen Server architecture.
    
• Manager with ~3-4 years of managerial experience . SOC Integration know-how

#LI-PK2

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

MANAGER – SILICON DESIGN ENGINEER  

• Technical Expertise :

Fair understanding of Processor based SoC Design Verification is required.

Prior work experience of working on PCIe/CXL/USB/SATA IP's at IP Level or Sub-System Level Verification is a plus.

Strong background of MIPS/X86/ARM Processor based IP/Sub-System Level Verification is desired.

Know-How about SOC Micro-Arch flows (Reset, Boot flow, Cache/Coherency, System Memory) is desired.

• Testbench Expertise :

Good understanding on Testbench Concepts, strong hands-on expertise in SV/UVM is must.

Developing and improving SV/UVM based testbench for functional verification of Processor and its components.

IP/Sub-System Verification background with Processor based Testbench is a must.

Good debugging skills using Simulator Waveform/Trace logs is required.

Prior exposure of working with any ISA simulator model based verification is a plus.

• Protocols :

Fair understanding on protocols : AXI3/ACE/CHI is must.

Prior work experience on High-Speed Serials - PCIe/CXL/USB/SATA/GT IP's is preferred.

• People Skills :
  • Self-motivated and adaptable to fast-moving design verification environment.
  • Willing to take up additional responsibilities to contribute to the team’s success.
• Role and Responsibilities :
  • Will be part of Server SOC Verification Team working at AMD Hyderabad/ Bangalore, India.
  • Responsible for Developing testbench components for SOC Design Verification.
  • Writing/Enhancing BFM/Checkers/Monitors/Other-SOC Verif Env's.
  • Bringing up Testbench with comprehensive verification plan and implementation of test cases.
  • Work with a cross geographic teams, IP/SOC-Architects, Design Verification Stakeholders, ensure required Verif Env exists for verifying Design of Next-Gen Server architecture.
    
• Manager with ~3-4 years of managerial experience . SOC Integration know-how

#LI-PK2