WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

THE ROLE: 

The Memory Quality Assurance Lead will ensure that all memories used within AMD are compliant to our stringent requirements and will not present any issues to customers that use them. As technologies become more advanced, and memory operation is pushed beyond the operating specifications from foundries, it becomes more and more critical that we identify any and all issues prior to receiving any silicon. There will be a lot of work needed to enhance and streamline our QA flows/methodologies as the memory designs become more complex and varied amongst different vendors.

THE PERSON: 

You have a passion for memory/analog IP, quality assurance, and design verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers to identify/resolve potential design failures and/or flow issues. Most importantly, you are willing to learn and have a detail-oriented perspective into identifying and resolving all anomalies, as well as ensuring any such issues are fully understood, explained, and addressed.

KEY RESPONSIBILITIES:

• Execute QA checks and analysis on all internally/externally developed memories and compilers.
• Enable and pipeclean validation flows on emerging technologies and testchips
• Automate, develop, fix, and enhance QA checks/flows for all memories used at AMD.
• Drive to eliminate all waivers in QA either by pursuing memory design or QA flow updates.
• Ensure complete coverage of compiler space is achieved as it is not feasible to perform QA on all permutations of compiled memories.
• Close collaboration with CAD teams and memory experts
• Create easy-to-understand summary reports to:
  • highlight issues to external vendors and/or internal teams.
  • help customers understand scope-of-changes per release.

PREFERRED EXPERIENCE: 

• Proficient understanding of SRAM/ROM architecture, operation, and requirements
• Expertise in basic Memory validation - including DFM, DRC, ERC, Functionality, LVS, Spice Checks, Trend Analysis
• Experience in enhanced Memory validation - including EMIR analysis, Physical Integration, Routability, and Spice Characterization
• Working knowledge of Verilog, liberty files, spice simulation, and ASIC design flows
• Comfortable with script programming, such as, TCL, Perl or C-shell languages in a UNIX environment
• Design experience in SRAM, although not mandatory, will allow optional opportunities if desired.

ACADEMIC CREDENTIALS: 

• Bachelor's or master's degree in computer engineering/Electrical Engineering 

Location: Markham, Ontario 

#LI-CS1

#LI-Hyrbid

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: 

The Memory Quality Assurance Lead will ensure that all memories used within AMD are compliant to our stringent requirements and will not present any issues to customers that use them. As technologies become more advanced, and memory operation is pushed beyond the operating specifications from foundries, it becomes more and more critical that we identify any and all issues prior to receiving any silicon. There will be a lot of work needed to enhance and streamline our QA flows/methodologies as the memory designs become more complex and varied amongst different vendors.

THE PERSON: 

You have a passion for memory/analog IP, quality assurance, and design verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers to identify/resolve potential design failures and/or flow issues. Most importantly, you are willing to learn and have a detail-oriented perspective into identifying and resolving all anomalies, as well as ensuring any such issues are fully understood, explained, and addressed.

KEY RESPONSIBILITIES:

• Execute QA checks and analysis on all internally/externally developed memories and compilers.
• Enable and pipeclean validation flows on emerging technologies and testchips
• Automate, develop, fix, and enhance QA checks/flows for all memories used at AMD.
• Drive to eliminate all waivers in QA either by pursuing memory design or QA flow updates.
• Ensure complete coverage of compiler space is achieved as it is not feasible to perform QA on all permutations of compiled memories.
• Close collaboration with CAD teams and memory experts
• Create easy-to-understand summary reports to:
  • highlight issues to external vendors and/or internal teams.
  • help customers understand scope-of-changes per release.

PREFERRED EXPERIENCE: 

• Proficient understanding of SRAM/ROM architecture, operation, and requirements
• Expertise in basic Memory validation - including DFM, DRC, ERC, Functionality, LVS, Spice Checks, Trend Analysis
• Experience in enhanced Memory validation - including EMIR analysis, Physical Integration, Routability, and Spice Characterization
• Working knowledge of Verilog, liberty files, spice simulation, and ASIC design flows
• Comfortable with script programming, such as, TCL, Perl or C-shell languages in a UNIX environment
• Design experience in SRAM, although not mandatory, will allow optional opportunities if desired.

ACADEMIC CREDENTIALS: 

• Bachelor's or master's degree in computer engineering/Electrical Engineering 

Location: Markham, Ontario 

#LI-CS1

#LI-Hyrbid