Memory Subsystem and Firmware Verification Engineer

Mar 08, 2023
Bellevue, United States
... Not specified
... Internship
Full time
... Office work

WHAT YOU DO AT AMD CHANGES EVERYTHING

 

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

 

AMD together we advance_

The Person:

Are you looking to take on and tackle advanced engineering challenges? We are looking for open minded, flexible, innovative, and creative Engineers looking to join a new team to develop a novel and non-traditional verification environment. Are you looking for a ground floor opportunity that requires being a self-starter and the ability to independently drive tasks to completion? We are also looking for strong interpersonal and communication skills – this position will be working collaboratively across the AMD organization! If this sounds like you, please apply!

The Role:

The Memory IO team is looking for passionate and experienced Verification engineers for the verification of high-speed LPDDRx, DDRx and inter-chip IO IPs as well as production firmware through the utilization of complex hybrid verification environments.  Be a part of the definition, design, and development phase of industry-leading Memory PHYs and interface IP, as well as the overall memory subsystem.  This opportunity includes verification of the memory subsystem across multiple product lines as well as pre-silicon production level firmware verification.

Come be a part of a cutting-edge team that delivers Industry leading IP and help our experts in RTL, Firmware, BIOS and architecture teams develop leading edge Memory interfaces!

REQUIRED SKILLS:

  • Excellent knowledge of C, C++, and UVM object-oriented design and scripting language.
  • VCS simulation and debug experience.
  • Ability to adapt learn new toolsets and frameworks.
  • Test plan development and maintenance as well as in depth knowledge of functional coverage constructs and test plan to coverage relationships.
  • Strong understanding of memory controllers, PHYs, and dram protocols.
  • Experience with DDR/JEDEC standard IP, DDR PHY, or Memory Controller verification.
  • Experience with low level, physical phenomena-oriented logic design is an asset (dealing with IO, clocking, voltage control, etc.).

PREFERRED EXPERIENCE DESIRED:

  • Knowledge of SystemC and Python.
  • Zebu Emulation verification and debug experience.
  • Memory VIP integration, initialization, and debug experience.
  • Applied knowledge of JEDEC standards in relationship to verification.
  • Strong understanding of synchronization techniques (handshakes, message passing); knowledge of hardware level clocking and multi-domain simulation synchronization.
  • Strong knowledge of git and perforce.
  • Development and maintenance of regressions as well as coverage databases.

ADDITIONAL EXPERIENCED DESIRED:

  • SoC IP knowledge and architectural understanding of the purpose of each IP.

EDUCATION:

  • Bachelor's degree in Electrical or Computer Engineering and relevant experience, or
  • Master's or PhD degree in Electrical or Computer Engineering with relevant experience.

LOCATION:  

  • Bellevue, WA
  • Boxborough, MA; Raleigh, NC can be considered.

 

#LI-MR1

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

The Person:

Are you looking to take on and tackle advanced engineering challenges? We are looking for open minded, flexible, innovative, and creative Engineers looking to join a new team to develop a novel and non-traditional verification environment. Are you looking for a ground floor opportunity that requires being a self-starter and the ability to independently drive tasks to completion? We are also looking for strong interpersonal and communication skills – this position will be working collaboratively across the AMD organization! If this sounds like you, please apply!

The Role:

The Memory IO team is looking for passionate and experienced Verification engineers for the verification of high-speed LPDDRx, DDRx and inter-chip IO IPs as well as production firmware through the utilization of complex hybrid verification environments.  Be a part of the definition, design, and development phase of industry-leading Memory PHYs and interface IP, as well as the overall memory subsystem.  This opportunity includes verification of the memory subsystem across multiple product lines as well as pre-silicon production level firmware verification.

Come be a part of a cutting-edge team that delivers Industry leading IP and help our experts in RTL, Firmware, BIOS and architecture teams develop leading edge Memory interfaces!

REQUIRED SKILLS:

  • Excellent knowledge of C, C++, and UVM object-oriented design and scripting language.
  • VCS simulation and debug experience.
  • Ability to adapt learn new toolsets and frameworks.
  • Test plan development and maintenance as well as in depth knowledge of functional coverage constructs and test plan to coverage relationships.
  • Strong understanding of memory controllers, PHYs, and dram protocols.
  • Experience with DDR/JEDEC standard IP, DDR PHY, or Memory Controller verification.
  • Experience with low level, physical phenomena-oriented logic design is an asset (dealing with IO, clocking, voltage control, etc.).

PREFERRED EXPERIENCE DESIRED:

  • Knowledge of SystemC and Python.
  • Zebu Emulation verification and debug experience.
  • Memory VIP integration, initialization, and debug experience.
  • Applied knowledge of JEDEC standards in relationship to verification.
  • Strong understanding of synchronization techniques (handshakes, message passing); knowledge of hardware level clocking and multi-domain simulation synchronization.
  • Strong knowledge of git and perforce.
  • Development and maintenance of regressions as well as coverage databases.

ADDITIONAL EXPERIENCED DESIRED:

  • SoC IP knowledge and architectural understanding of the purpose of each IP.

EDUCATION:

  • Bachelor's degree in Electrical or Computer Engineering and relevant experience, or
  • Master's or PhD degree in Electrical or Computer Engineering with relevant experience.

LOCATION:  

  • Bellevue, WA
  • Boxborough, MA; Raleigh, NC can be considered.

 

#LI-MR1

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