Microprocessor Cache RTL Design Engineer

Mar 27, 2024
Fort Collins, United States
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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THE ROLE:

AMD’s Cores Organization delivers industry leading CPU’s, Caches, and Chiplets that are the foundation of AMD’s server, client, and gaming business.  We are looking for an experienced VLSI RTL design engineer to join this innovative team as a technical expert.  In this role, the candidate will invent and implement the highest performance, most energy efficient cache and fabric designs in the industry. The candidate will be a key contributor and leader for AMD’s next generation cores and caches.  The candidate will join the team based in Fort Collins, CO.

 

THE PERSON:

The candidate has experience in Cache Controller Design and successful experience delivering on aggressive goals on aggressive schedules. As a microarchitecture and RTL engineer for our Cache designs, it is important for the candidate to enjoy engaging with many different teams covering a breadth of technical areas. We are pushing the envelope on chip performance, so the status quo must be challenged on every program. This environment requires creativity and innovation, but also excellent verbal and written communication skills. The candidate has strong analytical thinking and problem-solving skills and enjoys using those skills to accomplish goals that many might not think possible. Our team delivers critical designs for multiple AMD products and our team is growing both in capability and size, so the candidate must have the ability and desire to provide technical guidance to more junior engineers.

 

KEY RESPONSIBILITIES:

  • Provide successful Cache Architecture development and execution using RTL Design, Verilog HDL, and scripting. 
  • Collaborate with Cache and CPU Architects to design, document, and execute optimized high-performance Cache and Routing Fabric designs.
  • Collaborate with Physical Design to develop RTL that is optimized for physical construction and timing closure.
  • Collaborate with Design Verification to develop architecture and features that are documented clearly and are verifiable.
  • Collaborate with Design For Test teams to develop RTL that is reliable, testable, and manufacturable.
  • Work across global teams to solve complex architectural interactions between IP and SOC designs
  • Develop ways to improve our CPU design by increasing quality, by simplifying design complexities through innovation, and by improving our technical interactions with other teams
  • Solve design and tool problems requiring ground-breaking approaches and champion innovation across the organization.  Create technical presentations for peers and management.
  • Guide and mentor junior engineers.

PREFERRED EXPERIENCE:

  • Prior experience with successful Cache architecture development and execution
  • Prior experience collaborating effectively with a diverse team across disciplines.
  • Prior experience with Digital RTL Design, Verilog HDL, and Scripting

ACADEMIC CREDENTIALS:

  • BS/MS in EE, CS, CSE (or similar), plus 6+ years hardware design experience

LOCATION: Ft. Collins, CO


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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE:

AMD’s Cores Organization delivers industry leading CPU’s, Caches, and Chiplets that are the foundation of AMD’s server, client, and gaming business.  We are looking for an experienced VLSI RTL design engineer to join this innovative team as a technical expert.  In this role, the candidate will invent and implement the highest performance, most energy efficient cache and fabric designs in the industry. The candidate will be a key contributor and leader for AMD’s next generation cores and caches.  The candidate will join the team based in Fort Collins, CO.

 

THE PERSON:

The candidate has experience in Cache Controller Design and successful experience delivering on aggressive goals on aggressive schedules. As a microarchitecture and RTL engineer for our Cache designs, it is important for the candidate to enjoy engaging with many different teams covering a breadth of technical areas. We are pushing the envelope on chip performance, so the status quo must be challenged on every program. This environment requires creativity and innovation, but also excellent verbal and written communication skills. The candidate has strong analytical thinking and problem-solving skills and enjoys using those skills to accomplish goals that many might not think possible. Our team delivers critical designs for multiple AMD products and our team is growing both in capability and size, so the candidate must have the ability and desire to provide technical guidance to more junior engineers.

 

KEY RESPONSIBILITIES:

  • Provide successful Cache Architecture development and execution using RTL Design, Verilog HDL, and scripting. 
  • Collaborate with Cache and CPU Architects to design, document, and execute optimized high-performance Cache and Routing Fabric designs.
  • Collaborate with Physical Design to develop RTL that is optimized for physical construction and timing closure.
  • Collaborate with Design Verification to develop architecture and features that are documented clearly and are verifiable.
  • Collaborate with Design For Test teams to develop RTL that is reliable, testable, and manufacturable.
  • Work across global teams to solve complex architectural interactions between IP and SOC designs
  • Develop ways to improve our CPU design by increasing quality, by simplifying design complexities through innovation, and by improving our technical interactions with other teams
  • Solve design and tool problems requiring ground-breaking approaches and champion innovation across the organization.  Create technical presentations for peers and management.
  • Guide and mentor junior engineers.

PREFERRED EXPERIENCE:

  • Prior experience with successful Cache architecture development and execution
  • Prior experience collaborating effectively with a diverse team across disciplines.
  • Prior experience with Digital RTL Design, Verilog HDL, and Scripting

ACADEMIC CREDENTIALS:

  • BS/MS in EE, CS, CSE (or similar), plus 6+ years hardware design experience

LOCATION: Ft. Collins, CO


#LI-G11 

 

#LI-HYBRID

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