Mixed Signal (Analog / Digital) Si Design Engineer

Feb 25, 2024
Austin, United States
... Not specified
... Intermediate
Full time
... Office work


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Mixed Signal (Analog / Digital) Si Design Engineer

THE ROLE: 

We are searching for a senior Analog/Digital design engineer to join the Mixed Signal PHY design team in AMD.  This is an exciting opportunity to be a member of the IO design team responsible for defining, specifying, and implementing designs for the next generation of high-speed GDDR and high-speed clocking (PLLs) IP on advanced technologies for future generations of AMD’s products.  

THE PERSON: 

This candidate will possess knowledge of high-speed analog design techniques, for example DDR, GDDR, LPDDR, PLL, or SERDES.  Must have excellent analytical and problem-solving skills along with attention to details.  

 

KEY RESPONSIBILITIES: 

  • Design/implement various state-of-the-art, high-speed (32+Gbps) blocks for GDDR, PLL and other SerDes PHYs 
  • Deliver detailed specifications & documentation 
  • Develop design and work closely with layout/verification engineers to drive designs to completion (including physical verification and backend/reliability flows) 
  • Drive design and physical reviews to ensure quality of deliverables and mitigate overall risk 
  • Work closely with various disciplines (e.g. Layout, Logical Design, Physical Design, Firmware, and Design Verification) to ensure successful cross-team engagement and high-quality execution 
  • Must be a self-starter, able to drive tasks independently and efficiently to completion 
  • Strong/effective communication skills 
  • Enthusiastic team-first mentality 
  • Ability to provide mentorship and guidance to junior engineers 

 

PREFERRED EXPERIENCE: 

  • Good knowledge of high-speed GDDR, DDR, LPDDR, PLL or SerDes design (signaling/equalization techniques, analog/mixed-signal circuit design, High Speed digital design) 
  • Solid knowledge of industry-standard tools and practices for analog/mixed-signal and high-speed digital designs (e.g., HSPICE simulator, Cadence design environment, VCS, System Verilog) 
  • Familiarity with Unix/Linux environments, Perl, Python 
  • Ability to read and/or create Verilog models 
  • At least 12 years’ progressive experience in Analog/Digital Design 

 

 ACADEMIC CREDENTIALS:

  • Bachelors / Masters in Electrical Engineering

 

LOCATION

                   Austin, TX – Secondary Location

 

#LI-SL3

#LI-Hybrid 




At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Mixed Signal (Analog / Digital) Si Design Engineer

THE ROLE: 

We are searching for a senior Analog/Digital design engineer to join the Mixed Signal PHY design team in AMD.  This is an exciting opportunity to be a member of the IO design team responsible for defining, specifying, and implementing designs for the next generation of high-speed GDDR and high-speed clocking (PLLs) IP on advanced technologies for future generations of AMD’s products.  

THE PERSON: 

This candidate will possess knowledge of high-speed analog design techniques, for example DDR, GDDR, LPDDR, PLL, or SERDES.  Must have excellent analytical and problem-solving skills along with attention to details.  

 

KEY RESPONSIBILITIES: 

  • Design/implement various state-of-the-art, high-speed (32+Gbps) blocks for GDDR, PLL and other SerDes PHYs 
  • Deliver detailed specifications & documentation 
  • Develop design and work closely with layout/verification engineers to drive designs to completion (including physical verification and backend/reliability flows) 
  • Drive design and physical reviews to ensure quality of deliverables and mitigate overall risk 
  • Work closely with various disciplines (e.g. Layout, Logical Design, Physical Design, Firmware, and Design Verification) to ensure successful cross-team engagement and high-quality execution 
  • Must be a self-starter, able to drive tasks independently and efficiently to completion 
  • Strong/effective communication skills 
  • Enthusiastic team-first mentality 
  • Ability to provide mentorship and guidance to junior engineers 

 

PREFERRED EXPERIENCE: 

  • Good knowledge of high-speed GDDR, DDR, LPDDR, PLL or SerDes design (signaling/equalization techniques, analog/mixed-signal circuit design, High Speed digital design) 
  • Solid knowledge of industry-standard tools and practices for analog/mixed-signal and high-speed digital designs (e.g., HSPICE simulator, Cadence design environment, VCS, System Verilog) 
  • Familiarity with Unix/Linux environments, Perl, Python 
  • Ability to read and/or create Verilog models 
  • At least 12 years’ progressive experience in Analog/Digital Design 

 

 ACADEMIC CREDENTIALS:

  • Bachelors / Masters in Electrical Engineering

 

LOCATION

                   Austin, TX – Secondary Location

 

#LI-SL3

#LI-Hybrid 

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