MTS Silicon Design Engineer

May 28, 2024
Beijing, China
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




THE ROLE:

We are looking for an junior level SOC architect candidate who has some basic knowledge and experience in CPU Instruction Set Architecture including x86, or ARM or RSIC-V ISA, and who should have good understanding of the various Bus protocol especially ARM AMBA (CHI, ACE, AXI etc.) as well as the knowledge of the functions of various building blocks (e.g. interrupt controller, Memory Management Unit and IO-MMU, RAS etc.) that are tightly coupled to the CPU ISA in one SOC. 

It is a plus if the candidate has additional knowledge or experience in IO (PCIe, PCI, slow speed IPs like UART, I2C etc) or DRAM technology in the computer archtiecture.

 

THE PERSON:

You have passions for modern, complex processor architecture and digital design in general. You are a team player who has excellent communication skills while collaborating with other collegues located in different sites/timezones, adaptive to multi-culture working environment. You shall be self-motivated and proactive to own the problem at stake and always tries to reach to extra miles. This role requires very independent problem-solving skills with out-of-box thinking. 

 

KEY RESPONSIBILITIES:

  • Be accountable for certain subdivision of SOC architectrure exploration work and bring up proposals and finally deliver specifications to various IP design owners.
  • Be able to own some hands-on work with data processing scripting and RTL design as necessary. 
  • Do horizontal architecture comparison of existing ISA and their supporting SOC features and provide suggestions on improvements.

 

PREFERRED EXPERIENCE:

  • Master in Electrical Engineering, Computer Science or related
  • Good understanding on ASIC design verification flow
  • Knowledge of CPU ISA and SOC architecture features to support various ISA
  • Knowledge of Bus protocols in a computer architecture esp ARM AMBA protocols
  • Knowledge of IO and DRAM techonology in a computer architecture
  • Good RTL coding skills with Verilog/System Verilog and basic python scriping

 

ACADEMIC CREDENTIALS:

Bachelor’s or Master’s degree in EE or Computer science.

 

Location:

Beijing

 




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE:

We are looking for an junior level SOC architect candidate who has some basic knowledge and experience in CPU Instruction Set Architecture including x86, or ARM or RSIC-V ISA, and who should have good understanding of the various Bus protocol especially ARM AMBA (CHI, ACE, AXI etc.) as well as the knowledge of the functions of various building blocks (e.g. interrupt controller, Memory Management Unit and IO-MMU, RAS etc.) that are tightly coupled to the CPU ISA in one SOC. 

It is a plus if the candidate has additional knowledge or experience in IO (PCIe, PCI, slow speed IPs like UART, I2C etc) or DRAM technology in the computer archtiecture.

 

THE PERSON:

You have passions for modern, complex processor architecture and digital design in general. You are a team player who has excellent communication skills while collaborating with other collegues located in different sites/timezones, adaptive to multi-culture working environment. You shall be self-motivated and proactive to own the problem at stake and always tries to reach to extra miles. This role requires very independent problem-solving skills with out-of-box thinking. 

 

KEY RESPONSIBILITIES:

  • Be accountable for certain subdivision of SOC architectrure exploration work and bring up proposals and finally deliver specifications to various IP design owners.
  • Be able to own some hands-on work with data processing scripting and RTL design as necessary. 
  • Do horizontal architecture comparison of existing ISA and their supporting SOC features and provide suggestions on improvements.

 

PREFERRED EXPERIENCE:

  • Master in Electrical Engineering, Computer Science or related
  • Good understanding on ASIC design verification flow
  • Knowledge of CPU ISA and SOC architecture features to support various ISA
  • Knowledge of Bus protocols in a computer architecture esp ARM AMBA protocols
  • Knowledge of IO and DRAM techonology in a computer architecture
  • Good RTL coding skills with Verilog/System Verilog and basic python scriping

 

ACADEMIC CREDENTIALS:

Bachelor’s or Master’s degree in EE or Computer science.

 

Location:

Beijing

 

COMPANY JOBS
1127 available jobs
WEBSITE