WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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Member of Technical Staff : Low Power Design

The Person

As a member of the Strategic Silicon Solutions (S3) Business Unit within AMD, your execution will help bring to life customers Special requirements for designs to be used in a broad range of products, from tablets to gaming consoles to servers and more. You will be working closely with architecture, IP design, SoC implementation team, DFX, Design Verification team and physical design team to achieve first pass silicon success. A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

Key Responsibilities

• Work with architects to understand the product specification and power management features to build an efficient customer-focused solution.
• Translate technical knowledge and integrate these features accurately into our design.
• Interface with IP design team, SoC integration team, DFX, Design Verification and Physical design team to analyze and optimize the power management implementation.
• You will be part of the SoC Integration team on project execution.
• Responsible for IP and SoC level UPF generation and verification.
• You should be familiar with low power design, CDC/RDC, VSI LP, VDCI and clock/reset of a design.
• Involved with the scope and analysis of new designs.
• Actively work to continuously improve SOC development process
• We are looking for someone who is technically hands on and a great leader.

Preferred Experience

• BSEE/MSEE Electrical Engineering or Computer Engineering
• 8+ years of ASIC development experience including familiarity with the entire ASIC development process and tools
• Communicates openly and clearly in meetings, presentations, emails, and reports
• Significant experience with standard ASIC design tools (UPF, VSI LP, VDCI, synthesis, equivalence checking, static timing analysis, power check tool)
• Experience with SoC architecture and RTL coding in Verilog.
• Prior experience in integrating and compiling complex SOC models with multiple proprietary and third-party IP
• Experience working with Design Verification teams on functional and NLP VCS simulation.
• Experience with IP delivery process and methodologies

Job Location: Bangalore India

#LI-NF1

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Member of Technical Staff : Low Power Design

The Person

As a member of the Strategic Silicon Solutions (S3) Business Unit within AMD, your execution will help bring to life customers Special requirements for designs to be used in a broad range of products, from tablets to gaming consoles to servers and more. You will be working closely with architecture, IP design, SoC implementation team, DFX, Design Verification team and physical design team to achieve first pass silicon success. A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

Key Responsibilities

• Work with architects to understand the product specification and power management features to build an efficient customer-focused solution.
• Translate technical knowledge and integrate these features accurately into our design.
• Interface with IP design team, SoC integration team, DFX, Design Verification and Physical design team to analyze and optimize the power management implementation.
• You will be part of the SoC Integration team on project execution.
• Responsible for IP and SoC level UPF generation and verification.
• You should be familiar with low power design, CDC/RDC, VSI LP, VDCI and clock/reset of a design.
• Involved with the scope and analysis of new designs.
• Actively work to continuously improve SOC development process
• We are looking for someone who is technically hands on and a great leader.

Preferred Experience

• BSEE/MSEE Electrical Engineering or Computer Engineering
• 8+ years of ASIC development experience including familiarity with the entire ASIC development process and tools
• Communicates openly and clearly in meetings, presentations, emails, and reports
• Significant experience with standard ASIC design tools (UPF, VSI LP, VDCI, synthesis, equivalence checking, static timing analysis, power check tool)
• Experience with SoC architecture and RTL coding in Verilog.
• Prior experience in integrating and compiling complex SOC models with multiple proprietary and third-party IP
• Experience working with Design Verification teams on functional and NLP VCS simulation.
• Experience with IP delivery process and methodologies

Job Location: Bangalore India

#LI-NF1