MTS Silicon Design Engineer

Jun 04, 2024
Taipei, Taiwan
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




THE ROLE:

Be part of AMD IO IP team, joining IP design work on host controller IP for next generation of leading-edge super high speed IO, up to 40 Gb/s. Establishes and maintains AMD high speed IO technological leadership position.

 

KEY RESPONSIBILITIES:

  • Takes part in host controller design, based on architectural requirement for next generation IO. Works on RTL code development for IP blocks in Verilog HDL and make sure functional correct and reusable for different product lines.
  • Deals with complex problems.
  • Makes technical decisions.
  • Coaches and mentors junior staff.

 

PREFERRED EXPERIENCE:

  • Specialized knowledge of USB 3.1/3.2/4.0 or Thunderbolt in protocol and link layers is a plus. Specialized knowledge of PCIE or AMBA is a plus.
  • Expert of Verilog RTL design on large size digital IP.
  • Fluent English on talking, presentation and writing documents.
  • Work is performed with limited supervision. Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager.
  • Can solve complex, novel and non-recurring problems.

 

ACADEMIC CREDENTIALS:

  • MS/BS degree of EE or CS, with minimum 6/8 years’ experience.

 

LOCATION:

Hsinchu/Taipei

 


#LI-SC1




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE:

Be part of AMD IO IP team, joining IP design work on host controller IP for next generation of leading-edge super high speed IO, up to 40 Gb/s. Establishes and maintains AMD high speed IO technological leadership position.

 

KEY RESPONSIBILITIES:

  • Takes part in host controller design, based on architectural requirement for next generation IO. Works on RTL code development for IP blocks in Verilog HDL and make sure functional correct and reusable for different product lines.
  • Deals with complex problems.
  • Makes technical decisions.
  • Coaches and mentors junior staff.

 

PREFERRED EXPERIENCE:

  • Specialized knowledge of USB 3.1/3.2/4.0 or Thunderbolt in protocol and link layers is a plus. Specialized knowledge of PCIE or AMBA is a plus.
  • Expert of Verilog RTL design on large size digital IP.
  • Fluent English on talking, presentation and writing documents.
  • Work is performed with limited supervision. Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager.
  • Can solve complex, novel and non-recurring problems.

 

ACADEMIC CREDENTIALS:

  • MS/BS degree of EE or CS, with minimum 6/8 years’ experience.

 

LOCATION:

Hsinchu/Taipei

 


#LI-SC1

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