Package Layout Design Engineer

Feb 16, 2024
Austin, United States
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




THE PERSON:

The candidate is an experienced Package Layout Engineer that has excellent communication & project management skills and can complete the design task with least supervision. He/she must be able to work on a fast phase environment and collaborate well with others.

 

KEY RESPONSIBILITIES:

  • Co-design with Signal/Power Integrity and PCB design team to complete a substrate layout that will meet the design objectives for performance, cost and quality.
  • Support substrate design for probe card substrate , test chips and test vehicles for technology   
  • Co-design with SOC team to complete Bump matrix and Interposer design for 2.5D, COWOS, INFO and other advanced packaging technologies (Chiplet).
  • Contribute to the development and enhancements of process and methodologies to improve design efficiency.
  • Interact with Assembly houses and substrate vendors to achieve cost-efficient and high-quality design .
  • Mentor Junior Colleagues to enhance layout practices.

 

PREFERRED EXPERIENCE:

  • Experienced on designing complex substrate design or Silicon Interposers.
  • Very good understanding of Signal Integrity and power integrity principles.
  • Knowledge on using CAD Layout tools such as Cadence SIP, APD 23.1, First Encounter, ICC2 or other Packaging or Silicon Physical Layout Software.
  • Knowledge on Perl or Skill Script Programming are a plus.
  • Experience dealing with assembly , foundry, and substrate vendors.

 

ACADEMIC CREDENTIALS:

  • B.A. Sc. in Electrical Engineering, Computer Engineering, or Engineering Science

 

LOCATION:

Austin, TX, United States

 

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE PERSON:

The candidate is an experienced Package Layout Engineer that has excellent communication & project management skills and can complete the design task with least supervision. He/she must be able to work on a fast phase environment and collaborate well with others.

 

KEY RESPONSIBILITIES:

  • Co-design with Signal/Power Integrity and PCB design team to complete a substrate layout that will meet the design objectives for performance, cost and quality.
  • Support substrate design for probe card substrate , test chips and test vehicles for technology   
  • Co-design with SOC team to complete Bump matrix and Interposer design for 2.5D, COWOS, INFO and other advanced packaging technologies (Chiplet).
  • Contribute to the development and enhancements of process and methodologies to improve design efficiency.
  • Interact with Assembly houses and substrate vendors to achieve cost-efficient and high-quality design .
  • Mentor Junior Colleagues to enhance layout practices.

 

PREFERRED EXPERIENCE:

  • Experienced on designing complex substrate design or Silicon Interposers.
  • Very good understanding of Signal Integrity and power integrity principles.
  • Knowledge on using CAD Layout tools such as Cadence SIP, APD 23.1, First Encounter, ICC2 or other Packaging or Silicon Physical Layout Software.
  • Knowledge on Perl or Skill Script Programming are a plus.
  • Experience dealing with assembly , foundry, and substrate vendors.

 

ACADEMIC CREDENTIALS:

  • B.A. Sc. in Electrical Engineering, Computer Engineering, or Engineering Science

 

LOCATION:

Austin, TX, United States

 

#LI-HYBRID

#LI-AP3

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