PCIe Design Verification Engineer

Feb 15, 2024
Markham, Canada
... Not specified
... Intermediate
Full time
... Office work

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

THE ROLE: 

AMD is looking for a Design Verification Engineer willing to take on the challenge of becoming part of the PCIe Design Verification team. In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering AI Infrastructure, Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team is responsible for the Verification of several critical PCIe components as well as the integration of lower level IPs and delivery to SoC. The team is responsible for verifying a balanced architecture between power consumption and performance, delivering high complexity RTL code and Verification components, as well as creating advanced testbenches using leading-edge verification techniques.

 

THE PERSON: 

A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

 

KEY RESPONSIBILITIES: 

  • Verification of critical high speed digital designs using both coverage driven random and directed testing techniques.
  • Work on various aspects of the Verification flow from initial test planning to coverage convergence and sign-off closure for one or more PCIe features and aspects of IP interoperability.
  • Assist in building testbench components as well as developing test and sequence libraries, by applying Object Oriented Programming Verification techniques following UVM methodology.

 

PREFERRED EXPERIENCE: 

  • Background in ASIC Design Flow
  • Experience in Design Verification
  • Proficient in SystemVerilog
  • Experience with scripting languages like Python, Perl, Ruby, Makefile, shell
  • Experience in debugging firmware and RTL code using simulation tools
  • Familiarity with automating workflows in a distributed compute environment.  
  • Familiarity with industry standard high-speed protocols such as PCIe, SATA, USB or Ethernet
  • Strong analytical and problem solving skills with pronounced attention to detail
  • Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering

 

#LI-RD1 

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: 

AMD is looking for a Design Verification Engineer willing to take on the challenge of becoming part of the PCIe Design Verification team. In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering AI Infrastructure, Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team is responsible for the Verification of several critical PCIe components as well as the integration of lower level IPs and delivery to SoC. The team is responsible for verifying a balanced architecture between power consumption and performance, delivering high complexity RTL code and Verification components, as well as creating advanced testbenches using leading-edge verification techniques.

 

THE PERSON: 

A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

 

KEY RESPONSIBILITIES: 

  • Verification of critical high speed digital designs using both coverage driven random and directed testing techniques.
  • Work on various aspects of the Verification flow from initial test planning to coverage convergence and sign-off closure for one or more PCIe features and aspects of IP interoperability.
  • Assist in building testbench components as well as developing test and sequence libraries, by applying Object Oriented Programming Verification techniques following UVM methodology.

 

PREFERRED EXPERIENCE: 

  • Background in ASIC Design Flow
  • Experience in Design Verification
  • Proficient in SystemVerilog
  • Experience with scripting languages like Python, Perl, Ruby, Makefile, shell
  • Experience in debugging firmware and RTL code using simulation tools
  • Familiarity with automating workflows in a distributed compute environment.  
  • Familiarity with industry standard high-speed protocols such as PCIe, SATA, USB or Ethernet
  • Strong analytical and problem solving skills with pronounced attention to detail
  • Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering

 

#LI-RD1 

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