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A senior technical contributor that drives end-to-end delivery of AECG PCIe/CXL based solutions, directly contributing to, and coordinating implementation and optimization across multiple teams enable the next generation of PCIe technologies to power datacenter, acceleration, AI and communications markets.

THE ROLE: 

As a Principal Member of Technical Staff (PMTS) at AMD you will help create leading edge PCIe technologies used in a wide variety of applications. The focus of this role is to design, plan and execute system level solutions with new and existing PCIe technology and solutions for programmable silicon at AMD. Key development includes PCIe technologies for PCIe Gen 6, CXL, TDISP, IDE, PCIe in-line DMA and other leading-edge products.

THE PERSON:

You are a subject matter expert and strong technical contributor with passion for modern, complex processor architecture, digital design, and verification in general. You excel as part of a team where communication and team skills are highly valued.

KEY RESPONSIBILITIES:  

• Develop system level solutions using next generation PCIe, CXL and connectivity solutions to power datacenter, acceleration, communications, T&M markets.
• Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization including but not limited to architecture, design, and documentation for IPs.
• Develop comprehensive testing plans including Compliance and Interop testing. Critically review and provide feedback on the Design Implementations and Verification plans.
• Responsible for IP design, Silicon bring up, Validation and IP release
• Work in collaboration with the Global teams

PREFERRED EXPERIENCE:  

• Strong knowledge in RTL coding
• Knowledge of high-speed interfaces including, PCIe, CXL, Ethernet, DDR3/4/5, LPDDR3/4, HBM,  AMBA AXI/AHB/APB protocol
• Experience in developing system or IP prototypes using FPGAs.
• Strong knowledge of IP/SOC design methodologies
• Experience advocating for technical solutions in a collaborative team environment.
• Excellent communication and collaboration skills

ACADEMIC CREDENTIALS:  

• Bachelors or master’s degree in computer engineering/Electrical Engineering 

Location:

San Jose, Ca.

#LI-JT1

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

A senior technical contributor that drives end-to-end delivery of AECG PCIe/CXL based solutions, directly contributing to, and coordinating implementation and optimization across multiple teams enable the next generation of PCIe technologies to power datacenter, acceleration, AI and communications markets.

THE ROLE: 

As a Principal Member of Technical Staff (PMTS) at AMD you will help create leading edge PCIe technologies used in a wide variety of applications. The focus of this role is to design, plan and execute system level solutions with new and existing PCIe technology and solutions for programmable silicon at AMD. Key development includes PCIe technologies for PCIe Gen 6, CXL, TDISP, IDE, PCIe in-line DMA and other leading-edge products.

THE PERSON:

You are a subject matter expert and strong technical contributor with passion for modern, complex processor architecture, digital design, and verification in general. You excel as part of a team where communication and team skills are highly valued.

KEY RESPONSIBILITIES:  

• Develop system level solutions using next generation PCIe, CXL and connectivity solutions to power datacenter, acceleration, communications, T&M markets.
• Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization including but not limited to architecture, design, and documentation for IPs.
• Develop comprehensive testing plans including Compliance and Interop testing. Critically review and provide feedback on the Design Implementations and Verification plans.
• Responsible for IP design, Silicon bring up, Validation and IP release
• Work in collaboration with the Global teams

PREFERRED EXPERIENCE:  

• Strong knowledge in RTL coding
• Knowledge of high-speed interfaces including, PCIe, CXL, Ethernet, DDR3/4/5, LPDDR3/4, HBM,  AMBA AXI/AHB/APB protocol
• Experience in developing system or IP prototypes using FPGAs.
• Strong knowledge of IP/SOC design methodologies
• Experience advocating for technical solutions in a collaborative team environment.
• Excellent communication and collaboration skills

ACADEMIC CREDENTIALS:  

• Bachelors or master’s degree in computer engineering/Electrical Engineering 

Location:

San Jose, Ca.

#LI-JT1