WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

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The role:

The AMD NBIO team is seeking a technical manager with Silicon Validation or RTL Design background to lead the Post-Si debug team. You will work directly with Directors, PMs and other Managers to ensure high-quality, on-time IP silicon validation and production release. The IP is used in all AMD SoC’s to provide I/O and connectivity with AMD products.

Key responsibilities:

• Lead a team of engineering staff, manage assignment, monitor workload, and drive post-Si activities.
• Be able to work in a high demand, fast paced environment with multiple real-time problem solving and critical thinking.
• Deploy post-silicon debug infrastructure (software, hardware, automation environment, and lab setup)
• Lead collaborative technical discussions to drive resolution on technical issues and roll out technical initiatives.
• Create plans for IP validation execution
• Establish deliverable requirements, milestones, and metrics
• Track execution/debug progress
• Determine and align schedules with peer groups and internal customers
• Implement change control and issue management processes
• Coordinate with Debug, Platform, FW, and ATE validation teams on plans and execution
• Provide status and issue updates to internal managers and program leadership
• Drive continuous improvement and lessons learned

Preferred experience

• Management or technical leadership experience
• Knowledge of computer hardware architecture (CPU/APU, x86, PCIe, memory, bus logic) and software architecture (driver, bios, firmware usage)
• Familiar with high-speed I/O technologies and protocols
• Experience developing validation methodologies and infrastructure.
• Test plan and test development experience
• Participated in silicon bring up and debug, support to internal engineering teams.
• Able to execute and drive success of programs with multiple projects on the go.
• Debug skills at IP/system level
• Excellent organizational and communication skills
• Passion to win; drive to make a difference
• Ability to function (thrive) in a dynamic environment
• Knowledge of tools of the trade; Office365, issue ticket systems, web-based collaborative tools
• IP or SOC design or validation background preferred
• Demonstrate diligence, leadership, and judgment
• Good interpersonal skills

Education - Bachelor or Masters in Electrical Engineering

Location: Markham, ON. Canada. Vancouver, B.C. Canada. Austin, TX, US

#LI-CS1

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

The role:

The AMD NBIO team is seeking a technical manager with Silicon Validation or RTL Design background to lead the Post-Si debug team. You will work directly with Directors, PMs and other Managers to ensure high-quality, on-time IP silicon validation and production release. The IP is used in all AMD SoC’s to provide I/O and connectivity with AMD products.

Key responsibilities:

• Lead a team of engineering staff, manage assignment, monitor workload, and drive post-Si activities.
• Be able to work in a high demand, fast paced environment with multiple real-time problem solving and critical thinking.
• Deploy post-silicon debug infrastructure (software, hardware, automation environment, and lab setup)
• Lead collaborative technical discussions to drive resolution on technical issues and roll out technical initiatives.
• Create plans for IP validation execution
• Establish deliverable requirements, milestones, and metrics
• Track execution/debug progress
• Determine and align schedules with peer groups and internal customers
• Implement change control and issue management processes
• Coordinate with Debug, Platform, FW, and ATE validation teams on plans and execution
• Provide status and issue updates to internal managers and program leadership
• Drive continuous improvement and lessons learned

Preferred experience

• Management or technical leadership experience
• Knowledge of computer hardware architecture (CPU/APU, x86, PCIe, memory, bus logic) and software architecture (driver, bios, firmware usage)
• Familiar with high-speed I/O technologies and protocols
• Experience developing validation methodologies and infrastructure.
• Test plan and test development experience
• Participated in silicon bring up and debug, support to internal engineering teams.
• Able to execute and drive success of programs with multiple projects on the go.
• Debug skills at IP/system level
• Excellent organizational and communication skills
• Passion to win; drive to make a difference
• Ability to function (thrive) in a dynamic environment
• Knowledge of tools of the trade; Office365, issue ticket systems, web-based collaborative tools
• IP or SOC design or validation background preferred
• Demonstrate diligence, leadership, and judgment
• Good interpersonal skills

Education - Bachelor or Masters in Electrical Engineering

Location: Markham, ON. Canada. Vancouver, B.C. Canada. Austin, TX, US

#LI-CS1