Power Optimization and modeling Engineer - AI Processor

May 08, 2024
Bengaluru, India
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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SMTS SILICON DESIGN ENGINEER

Position Title:

SMTS - Power Optimization and modeling Engineer - AI Processor

 

Job Description:

Key responsibilities:

  • Responsible for 3 main areas, 1. Power optimization, 2. Power modeling and 3. Power correlation of cutting-edge IPs/Subsystem/SoCs across AMD family of products.
  • Run power tools like PowerArtist and Primetime PX (PTPX) on various IPs/SoC.
  • Review power reports and identify the outliers to debug the root cause of high-power consumption blocks.
  • Recommend fixes and enhancements in Architecture and RTL design to reduce power.
  • Provide feedback to IP teams to drive power optimization efforts throughout the project.
  • Come up with bottoms-up estimate and top-down target for new IP/SubSystem/SoC
  • Should be a team player, eagerness to learn new technology in low power space.
  • Wherever possible come up with a new/innovative flow to simplify existing data (area vs signal-activity vs dynamic power etc..) to improve power projections.

 

Preferred Experience:

  • Familiarity with low power/power optimization concepts in front-end and back-end design
  • Familiarity with Verdi, PowerArtist tool and PrimetimePX(PTPX) tool.

 

ACADEMIC CREDENTIALS:

  • MS degree in Computer Science, Software Engineering, Electrical Engineering, Integrated Circuit Engineering or an equivalent
  • More than 10 years of experience in design in digital ASIC chips. knowledge on CPU, GPU, network, Video/audio, router, communication or advanced and complex chips.

#LI-NS1




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS SILICON DESIGN ENGINEER

Position Title:

SMTS - Power Optimization and modeling Engineer - AI Processor

 

Job Description:

Key responsibilities:

  • Responsible for 3 main areas, 1. Power optimization, 2. Power modeling and 3. Power correlation of cutting-edge IPs/Subsystem/SoCs across AMD family of products.
  • Run power tools like PowerArtist and Primetime PX (PTPX) on various IPs/SoC.
  • Review power reports and identify the outliers to debug the root cause of high-power consumption blocks.
  • Recommend fixes and enhancements in Architecture and RTL design to reduce power.
  • Provide feedback to IP teams to drive power optimization efforts throughout the project.
  • Come up with bottoms-up estimate and top-down target for new IP/SubSystem/SoC
  • Should be a team player, eagerness to learn new technology in low power space.
  • Wherever possible come up with a new/innovative flow to simplify existing data (area vs signal-activity vs dynamic power etc..) to improve power projections.

 

Preferred Experience:

  • Familiarity with low power/power optimization concepts in front-end and back-end design
  • Familiarity with Verdi, PowerArtist tool and PrimetimePX(PTPX) tool.

 

ACADEMIC CREDENTIALS:

  • MS degree in Computer Science, Software Engineering, Electrical Engineering, Integrated Circuit Engineering or an equivalent
  • More than 10 years of experience in design in digital ASIC chips. knowledge on CPU, GPU, network, Video/audio, router, communication or advanced and complex chips.

#LI-NS1

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