Pre-Silicon Verification Engineer

Nov 30, 2023
San Jose, United States
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




THE ROLE: 

This is an exciting opportunity in IP Verification to work on IPs based on PCIe, CXL, DMA and NVMe technologies in AECG business group in AMD. The candidate will have the opportunity to work and develop on state-of-art UVM based verification environment on highly configurable IPs designed for adaptive computing products targeted for datacenter performance and acceleration needs.  .

 

THE PERSON: 

You are a highly motivated self starter who likes to solve problems. You have proven ability to work in a fast - paced team environment with excellent communication skills. You have strong analytical and strong UVM Testbench coding skills and are willing to learn and ready to take on challenges.  

 

KEY RESPONSIBILITIES: 

  • Verifying RTL implementation for complex digital blocks to ensure high quality 

  • Developing verification strategies for new features, plan volume validation and coverage strategies 

  • Writing testplan, developing testbenches, coding test/sequences and checker to support IP level verification in constrained-random and/or directed verification environments using System Verilog & UVM 

  • Working with designers to do coverage analysis and take necessary actions to meet coverage goals 

  • Integrate VIPs as needed 

  • Closely work with design teams to drive feature enablement 

  • Mentor junior engineers on the team   

 

PREFERRED EXPERIENCE: 

  • Grounds-up development experience with implementation of UVM/OVM and/or Verilog, System Verilog test benches and/or BFMs is required 

  •  Working experience on PCIe, DMA, CXL and/or NVMe  technologies required 

  • Knowledge of bus protocols like AXI/AHB desired 

  • Strong understanding of simulation tools and knowledge of scripting languages like Perl, tcl or cshell 

  • Experience with various verification activities through different phases of silicon project. 

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

LOCATION: San Jose, CA 

 

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: 

This is an exciting opportunity in IP Verification to work on IPs based on PCIe, CXL, DMA and NVMe technologies in AECG business group in AMD. The candidate will have the opportunity to work and develop on state-of-art UVM based verification environment on highly configurable IPs designed for adaptive computing products targeted for datacenter performance and acceleration needs.  .

 

THE PERSON: 

You are a highly motivated self starter who likes to solve problems. You have proven ability to work in a fast - paced team environment with excellent communication skills. You have strong analytical and strong UVM Testbench coding skills and are willing to learn and ready to take on challenges.  

 

KEY RESPONSIBILITIES: 

  • Verifying RTL implementation for complex digital blocks to ensure high quality 

  • Developing verification strategies for new features, plan volume validation and coverage strategies 

  • Writing testplan, developing testbenches, coding test/sequences and checker to support IP level verification in constrained-random and/or directed verification environments using System Verilog & UVM 

  • Working with designers to do coverage analysis and take necessary actions to meet coverage goals 

  • Integrate VIPs as needed 

  • Closely work with design teams to drive feature enablement 

  • Mentor junior engineers on the team   

 

PREFERRED EXPERIENCE: 

  • Grounds-up development experience with implementation of UVM/OVM and/or Verilog, System Verilog test benches and/or BFMs is required 

  •  Working experience on PCIe, DMA, CXL and/or NVMe  technologies required 

  • Knowledge of bus protocols like AXI/AHB desired 

  • Strong understanding of simulation tools and knowledge of scripting languages like Perl, tcl or cshell 

  • Experience with various verification activities through different phases of silicon project. 

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

LOCATION: San Jose, CA 

 

#LI-DW1

#HYBRID

 

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