WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

PRINCIPAL SYSTEMS ARCHITECT 

THE ROLE: 

We are seeking an engineer to join our team that will thrive in a fast-paced work environment, using effective communication, problem-solving and prioritization skills. Individuals that are well organized, show great attention to detail, and employ critical thinking are well-suited for our team.   

THE PERSON: 

This AMD (Advanced Micro Devices) team is looking for a senior level person that can help guide the team, mentor upcoming developers, provide long range strategy, and is willing to jump in to help resolve issues quickly. We are seeking an experienced Principal System Architect specializing in high-throughput IO applications, protocol development, and system performance optimization. The ideal candidate will work closely with our EPYC silicon design partners to push the boundaries of system performance, with a focus on DPDK (Data Plane Development Kit), SEV (Secure Encrypted Virtualization), and advanced protocol stack development. You will be responsible for maximizing the performance, resilience, and reliability of our solutions, making every cycle count for applications demanding the highest IO capabilities.

KEY RESPONSIBILITIES: 

• Architectural Leadership: Lead system architecture design efforts that maximize IO throughput on the EPYC CPU platform, focusing on high-demand, high-reliance applications.
• Collaborative Design: Work directly with EPYC silicon designers and firmware developers to align system architecture with silicon capabilities, leveraging DPDK, SEV, and other advanced development kits.
• Protocol Development: Design, implement, and optimize custom protocol stacks that enhance data flow, reliability, and performance in high IO environments.
• Performance Tuning: Analyze, profile, and optimize applications, firmware, and drivers to extract maximum throughput and efficiency from EPYC CPUs and associated accelerators.
• System Reliability: Implement resilient system architectures and recovery mechanisms to ensure high availability and data integrity under demanding conditions.
• Benchmarking and Optimization: Define and execute benchmarking tests to evaluate performance bottlenecks, apply tuning methodologies, and improve the system’s ability to handle large-scale, high-speed data transfers.
• Mentorship: Guide junior engineers and collaborate across engineering, hardware, and silicon teams to promote best practices in system design and high-performance IO applications.

ROLE WILL DEMONSTRATE:

• Architectural Vision: Capability to see the "big picture" and conceptualize systems that efficiently leverage the unique strengths of EPYC CPUs and advanced silicon capabilities.
• Technical Depth in IO Optimization: In-depth knowledge of protocol design, DPDK development, and virtualization technologies (e.g., SEV) that push system performance to the limit.
• Hands-On System Design Experience: Strong, hands-on expertise in designing, profiling, and tuning high-throughput, high-availability systems.
• Proven Performance Tuning Abilities: Demonstrated success in squeezing out the last bits of throughput from systems under heavy IO loads, with experience in low-level performance tuning and bottleneck elimination.
• Reliability Engineering Focus: Commitment to building systems that meet stringent reliability and availability requirements, with experience implementing redundant and fail-safe mechanisms.
• Collaborative and Communication Skills: Strong communication skills to work effectively with cross-functional teams and mentor junior engineers, with a focus on fostering a high-performance culture.

PREFERRED EXPERIENCE: 

• Industry Certifications: Relevant certifications in high-performance computing, security, or networking (e.g., CCIE, Certified Performance Engineer).
• Prior Experience with AMD Platforms: Hands-on experience with AMD EPYC or similar platforms, including familiarity with specific architectural nuances that impact performance.
• Technical Publications and Contributions: Contributions to technical journals, patents, or publications in areas related to high IO performance, protocol development, or systems architecture

ACADEMIC CREDENTIALS: 

• Bachelor’s or Master’s in Electrical Engineer, Computer Engineering, Computer Science, or a closely related field 

LOCATION: 

Austin, TX 

#LI-LM1

#LI-HYBRID 

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

PRINCIPAL SYSTEMS ARCHITECT 

THE ROLE: 

We are seeking an engineer to join our team that will thrive in a fast-paced work environment, using effective communication, problem-solving and prioritization skills. Individuals that are well organized, show great attention to detail, and employ critical thinking are well-suited for our team.   

THE PERSON: 

This AMD (Advanced Micro Devices) team is looking for a senior level person that can help guide the team, mentor upcoming developers, provide long range strategy, and is willing to jump in to help resolve issues quickly. We are seeking an experienced Principal System Architect specializing in high-throughput IO applications, protocol development, and system performance optimization. The ideal candidate will work closely with our EPYC silicon design partners to push the boundaries of system performance, with a focus on DPDK (Data Plane Development Kit), SEV (Secure Encrypted Virtualization), and advanced protocol stack development. You will be responsible for maximizing the performance, resilience, and reliability of our solutions, making every cycle count for applications demanding the highest IO capabilities.

KEY RESPONSIBILITIES: 

• Architectural Leadership: Lead system architecture design efforts that maximize IO throughput on the EPYC CPU platform, focusing on high-demand, high-reliance applications.
• Collaborative Design: Work directly with EPYC silicon designers and firmware developers to align system architecture with silicon capabilities, leveraging DPDK, SEV, and other advanced development kits.
• Protocol Development: Design, implement, and optimize custom protocol stacks that enhance data flow, reliability, and performance in high IO environments.
• Performance Tuning: Analyze, profile, and optimize applications, firmware, and drivers to extract maximum throughput and efficiency from EPYC CPUs and associated accelerators.
• System Reliability: Implement resilient system architectures and recovery mechanisms to ensure high availability and data integrity under demanding conditions.
• Benchmarking and Optimization: Define and execute benchmarking tests to evaluate performance bottlenecks, apply tuning methodologies, and improve the system’s ability to handle large-scale, high-speed data transfers.
• Mentorship: Guide junior engineers and collaborate across engineering, hardware, and silicon teams to promote best practices in system design and high-performance IO applications.

ROLE WILL DEMONSTRATE:

• Architectural Vision: Capability to see the "big picture" and conceptualize systems that efficiently leverage the unique strengths of EPYC CPUs and advanced silicon capabilities.
• Technical Depth in IO Optimization: In-depth knowledge of protocol design, DPDK development, and virtualization technologies (e.g., SEV) that push system performance to the limit.
• Hands-On System Design Experience: Strong, hands-on expertise in designing, profiling, and tuning high-throughput, high-availability systems.
• Proven Performance Tuning Abilities: Demonstrated success in squeezing out the last bits of throughput from systems under heavy IO loads, with experience in low-level performance tuning and bottleneck elimination.
• Reliability Engineering Focus: Commitment to building systems that meet stringent reliability and availability requirements, with experience implementing redundant and fail-safe mechanisms.
• Collaborative and Communication Skills: Strong communication skills to work effectively with cross-functional teams and mentor junior engineers, with a focus on fostering a high-performance culture.

PREFERRED EXPERIENCE: 

• Industry Certifications: Relevant certifications in high-performance computing, security, or networking (e.g., CCIE, Certified Performance Engineer).
• Prior Experience with AMD Platforms: Hands-on experience with AMD EPYC or similar platforms, including familiarity with specific architectural nuances that impact performance.
• Technical Publications and Contributions: Contributions to technical journals, patents, or publications in areas related to high IO performance, protocol development, or systems architecture

ACADEMIC CREDENTIALS: 

• Bachelor’s or Master’s in Electrical Engineer, Computer Engineering, Computer Science, or a closely related field 

LOCATION: 

Austin, TX 

#LI-LM1

#LI-HYBRID