WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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THE ROLE:

AMD’s Low Power Advanced Development team is seeking a talented, self-motivated individual to develop Low Power innovations that enable industry-leading power efficient computing and graphics products. This role will involve R&D engineers who serve as key contributors, in small project teams, working on low power advanced-development projects.

THE PERSON:

We are looking for the right individual to drive challenging projects in Low Power Design, leveraging, and building on the latest modern semiconductor technologies. A proven track record of technical leadership, mentorship, and innovation is highly desired for this role.

KEY RESPONSIBILITIES:

• Logic RTL design for custom mixed-signal circuits in advanced CMOS technologies.
• Design logic blocks in Verilog for optimal performance/area/power.
• Work closely with Physical Design teams, IP and SoC level to optimize implementation, enable SoC integration, close timing, and identify, resolve, and document design cycle roadblocks.
• Create individually, or in collaboration, with other team members on design reviews, technical reports, and other documentation required for meeting design quality requirements up to and including tape-out signoff.
• Work with design leads to understand features to be implemented and verified.
• Provide support in simulation, emulation, and silicon environments.
• Job responsibilities also include initial verification and debugging test failures, design documentation and verification plan creation, specifying coverage points, reviewing functional and code coverage results to increase coverage.

PREFERRED EXPERIENCE:

• Must have experience in RTL level ASIC design, including use of a source control system and RTL linting tools, and debugging RTL code using simulation tools.

• Must be an expert in Verilog, proficient in System Verilog, VerilogA, C/C++, Perl, TCL, Unix shell scripting, and working in Linux and Windows environments. VCS/Verdi experience is highly desired.
• Must be able to understand, create and debug STA constraints.
• Strong understanding of synthesis, P&R, and clock domain crossing design methodologies.
• Experience with clock generators such as PLL and FLL.
• Strong analytical thinking and problem-solving skills, excellent attention to detail, and good coding skills and style required.
• Understanding of basic analog blocks (Linear and Switching voltage regulators, DAC, ADC, comparators, oscillators, high speed circuits), as well as analog/mixed signal design concepts and CMOS processes.
• Familiarity with Cadence's custom IC design environment and spice electrical simulators is a plus.
• Strong verbal and written communication skills, and the ability to create positive teamwork are essential in our fastmoving environment.

 ACADEMIC CREDENTIALS:  

• MS or PhD Electrical Engineering and/or Computer Architecture work experience.

LOCATION: Austin, TX

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At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE:

AMD’s Low Power Advanced Development team is seeking a talented, self-motivated individual to develop Low Power innovations that enable industry-leading power efficient computing and graphics products. This role will involve R&D engineers who serve as key contributors, in small project teams, working on low power advanced-development projects.

THE PERSON:

We are looking for the right individual to drive challenging projects in Low Power Design, leveraging, and building on the latest modern semiconductor technologies. A proven track record of technical leadership, mentorship, and innovation is highly desired for this role.

KEY RESPONSIBILITIES:

• Logic RTL design for custom mixed-signal circuits in advanced CMOS technologies.
• Design logic blocks in Verilog for optimal performance/area/power.
• Work closely with Physical Design teams, IP and SoC level to optimize implementation, enable SoC integration, close timing, and identify, resolve, and document design cycle roadblocks.
• Create individually, or in collaboration, with other team members on design reviews, technical reports, and other documentation required for meeting design quality requirements up to and including tape-out signoff.
• Work with design leads to understand features to be implemented and verified.
• Provide support in simulation, emulation, and silicon environments.
• Job responsibilities also include initial verification and debugging test failures, design documentation and verification plan creation, specifying coverage points, reviewing functional and code coverage results to increase coverage.

PREFERRED EXPERIENCE:

• Must have experience in RTL level ASIC design, including use of a source control system and RTL linting tools, and debugging RTL code using simulation tools.

• Must be an expert in Verilog, proficient in System Verilog, VerilogA, C/C++, Perl, TCL, Unix shell scripting, and working in Linux and Windows environments. VCS/Verdi experience is highly desired.
• Must be able to understand, create and debug STA constraints.
• Strong understanding of synthesis, P&R, and clock domain crossing design methodologies.
• Experience with clock generators such as PLL and FLL.
• Strong analytical thinking and problem-solving skills, excellent attention to detail, and good coding skills and style required.
• Understanding of basic analog blocks (Linear and Switching voltage regulators, DAC, ADC, comparators, oscillators, high speed circuits), as well as analog/mixed signal design concepts and CMOS processes.
• Familiarity with Cadence's custom IC design environment and spice electrical simulators is a plus.
• Strong verbal and written communication skills, and the ability to create positive teamwork are essential in our fastmoving environment.

 ACADEMIC CREDENTIALS:  

• MS or PhD Electrical Engineering and/or Computer Architecture work experience.

LOCATION: Austin, TX

#LI-TB2

#HYBRID