WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

AMD together we advance_

RTL DESIGN ENGINEER
THE ROLE: 
AMD SerDes Technology team is searching for a passionate and innovative design engineer to develop high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS processes.

THE PERSON:  
You have an innovative mindset and a passion for digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:  

• Collaborate with system architects to micro-architect cutting edge high-speed SerDes PHY design
• RTL design of digital blocks, such as calibration and adaptation loops, digital signal processing, clock-data-recovery
• Apply low power design techniques and perform PPA analysis
• Verify intended functionality with block-level test bench
• Run design checker tools such as LINT and CDC etc.
• Behavioral modeling of custom circuit using Verilog/System Verilog
• Support functional verification and debug of design, and static timing closure
• Collaborate with physical design and validation teams to perform pre-tape out design sign-off and silicon bring-up

PREFERRED EXPERIENCE:  

• Proficient in logic design concepts and RTL coding using Verilog/System Verilog
• Proficient in micro-architecture and developing design specifications
• Proficient with design checker tools and/or functional verification tools
• Knowledge of synthesis flow and static timing analysis
• Knowledge of low power design and methodology
• Experience in design with multiple clock domains
• Experience in mixed signal design
• Experience with Python, Perl, TCL and/or other scripting language
• Experience with SerDes PHY (PMA/PCS) and/or high-speed I/O protocol is preferred

ACADEMIC CREDENTIALS:  

• Bachelor's or master’s degree in electrical engineering, Computer Engineering, or related field

#LI-DP1

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

RTL DESIGN ENGINEER
THE ROLE: 
AMD SerDes Technology team is searching for a passionate and innovative design engineer to develop high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS processes.

THE PERSON:  
You have an innovative mindset and a passion for digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:  

• Collaborate with system architects to micro-architect cutting edge high-speed SerDes PHY design
• RTL design of digital blocks, such as calibration and adaptation loops, digital signal processing, clock-data-recovery
• Apply low power design techniques and perform PPA analysis
• Verify intended functionality with block-level test bench
• Run design checker tools such as LINT and CDC etc.
• Behavioral modeling of custom circuit using Verilog/System Verilog
• Support functional verification and debug of design, and static timing closure
• Collaborate with physical design and validation teams to perform pre-tape out design sign-off and silicon bring-up

PREFERRED EXPERIENCE:  

• Proficient in logic design concepts and RTL coding using Verilog/System Verilog
• Proficient in micro-architecture and developing design specifications
• Proficient with design checker tools and/or functional verification tools
• Knowledge of synthesis flow and static timing analysis
• Knowledge of low power design and methodology
• Experience in design with multiple clock domains
• Experience in mixed signal design
• Experience with Python, Perl, TCL and/or other scripting language
• Experience with SerDes PHY (PMA/PCS) and/or high-speed I/O protocol is preferred

ACADEMIC CREDENTIALS:  

• Bachelor's or master’s degree in electrical engineering, Computer Engineering, or related field

#LI-DP1