Senior Analog Design Engineer - 157925
What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
Analog Design Engineer (GDDR IO)
We are searching for a senior AMS design engineer to join the GDDR PHY design team. This is an exciting opportunity to be a member of the Memory IO design team responsible for defining, specifying, and implementing circuits for the next generation of high-speed GDDR PAM4 and inter-chip IO IP on advanced technologies for future generations of AMD’s graphics and semi-custom products.
This candidate will possess
- Knowledge of high-speed analog design techniques, for example DDR, GDDR, or SERDES
- Excellent analytical and problem-solving skills along with attention to details
- Must be a self-starter, able to drive tasks independently and efficiently to completion
- Strong/effective communication skills
- Enthusiastic team-first mentality
- Ability to provide mentorship and guidance to junior engineers
- Relevant academic background (M. degree preferred) and at least 8 years’ progressive experience
- Design/implement various state-of-the-art, high-speed (32+Gbps) analog/mixed-signal blocks for GDDR and other SerDes PHYs
- Deliver detailed specifications & documentation
- Develop circuit schematics and work closely with layout designers to drive designs to completion (including physical verification and backend/reliability flows)
- Drive design and layout reviews to ensure quality of deliverables and mitigate overall risk
- Work closely with various disciplines (e.g. Layout, Logical Design, Physical Design, Firmware, and Design Verification) to ensure successful cross-team engagement and high-quality execution
- Good knowledge of high-speed GDDR, DDR, LPDDR, or SerDes design (signaling/equalization techniques, analog/mixed-signal circuit design, and signal integrity)
- Solid knowledge of industry-standard tools and practices for analog/mixed-signal and high-speed digital designs (e.g., HSPICE simulator, Cadence design environment)
- Experience in advanced deep submicron semiconductor technologies, preferably FinFET
- Familiarity with Unix/Linux environments, Perl, Python, and/or MATLAB
- Ability to read and/or create Verilog models
- At least 8 years’ progressive experience in Analog/Mixed-Signal Circuit Design
- Relevant academic background (Master’s degree preferred)
Santa Clara, California / Sacramento, California
Requisition Number: 157925
Country: United States State: California City: Santa Clara
Job Function: Design
Benefits offered are described here.
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