WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

AMD together we advance_

THE ROLE: 

In this role, as part of CAD Methodology team, you’ll have the opportunity to develop and deploy differentiating methodologies for next generation AMD designs. Your contributions will impact several products across all market segments from adaptive embedded computing, server, desktop to laptop designs.

THE PERSON: 

You are a dynamic, self-motivated, experienced, detail-oriented timing analysis engineer with strong technical knowledge. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES: 

• Develop and deliver timing methodology and flow for next generation designs.
• Release high quality flows and provide support to design teams on critical issues.
• Evaluate and qualify capabilities of new EDA tools and collaboratively develop new features.
• Provide technical leadership, mentoring and customer support in a global multi-cultural work environment.

PREFERRED EXPERIENCE: 

• Strong digital fundamentals. Proficient in Static Timing Analysis (STA) methodologies for timing closure.
• Expert user of PrimeTime. Working knowledge of extraction and STA tools.
• Experience with analyzing timing reports and identifying design/constraint issues.
• Familiarity with Verilog and System Verilog for design.
• Familiarity with 3DIC design implementation and analysis.
• Requires EDA tool competence and strong scripting capability.
• Excellent UNIX and programming skills (Perl, Python, and TCL). 
• Ability to provide technical presentations and write clear documentation.
• Experience working on multiple projects in a global team environment.

ACADEMIC CREDENTIALS: 

• Bachelors or Masters degree in computer engineering/Electrical Engineering 

LOCATION:

Santa Clara, CA

COMPENSATION RANGE:

Expected to range from $114,400 to $171,600, commensurate with experience and specific skill sets.

#LI-MF2

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: 

In this role, as part of CAD Methodology team, you’ll have the opportunity to develop and deploy differentiating methodologies for next generation AMD designs. Your contributions will impact several products across all market segments from adaptive embedded computing, server, desktop to laptop designs.

THE PERSON: 

You are a dynamic, self-motivated, experienced, detail-oriented timing analysis engineer with strong technical knowledge. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES: 

• Develop and deliver timing methodology and flow for next generation designs.
• Release high quality flows and provide support to design teams on critical issues.
• Evaluate and qualify capabilities of new EDA tools and collaboratively develop new features.
• Provide technical leadership, mentoring and customer support in a global multi-cultural work environment.

PREFERRED EXPERIENCE: 

• Strong digital fundamentals. Proficient in Static Timing Analysis (STA) methodologies for timing closure.
• Expert user of PrimeTime. Working knowledge of extraction and STA tools.
• Experience with analyzing timing reports and identifying design/constraint issues.
• Familiarity with Verilog and System Verilog for design.
• Familiarity with 3DIC design implementation and analysis.
• Requires EDA tool competence and strong scripting capability.
• Excellent UNIX and programming skills (Perl, Python, and TCL). 
• Ability to provide technical presentations and write clear documentation.
• Experience working on multiple projects in a global team environment.

ACADEMIC CREDENTIALS: 

• Bachelors or Masters degree in computer engineering/Electrical Engineering 

LOCATION:

Santa Clara, CA

COMPENSATION RANGE:

Expected to range from $114,400 to $171,600, commensurate with experience and specific skill sets.

#LI-MF2