Senior PCIe Design Verification Engineer

Feb 15, 2024
Markham, Canada
... Not specified
... Senior
Full time
... Office work

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

THE ROLE: 

AMD is looking for an experienced Design Verification Engineer willing to take on the challenge of verifying a part of the PCIe Controller Design. In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering AI Infrastructure, Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team is responsible for the Verification of several critical PCIe components as well as the integration of lower level IPs and delivery to SoC. The team is responsible for verifying a balanced architecture between power consumption and performance, delivering high complexity RTL code and Verification components, as well as creating advanced testbenches using leading-edge verification techniques.

THE PERSON:

A successful candidate will work with architects and design and verification leads. The candidate will be highly accurate, independent and detail-oriented, possessing strong communication, mentoring and problem-solving skills. Can work well with cross functional teams. Skilled at driving tasks and initiatives from start to completion with superior quality. Strives to learn and perform at his or her highest potential in a technical capacity. Flexible in working hours to accommodate working with team members in different time-zones.

KEY RESPONSIBLITIES:

  • Work on functional verification execution from test plan to verification signoff.
  • Collaborate with architects and designers to understand the IP features.
  • Write/Implement/Review Test Plans.
  • Verification of critical high speed digital designs using both coverage driven constrained random and directed testing techniques as well as Formal verification.
  • Own some or all aspects of the Verification flow from initial test planning to coverage convergence and sign-off closure for one or more features and aspects of block level IP interoperability.
  • Build testbench components and develop test and sequence libraries by applying Object Oriented Programming Verification techniques following UVM methodology.
  • Conduct and contribute to Code Reviews.
  • Technical leadership, including block ownership from start to finish and verification sign-off.

 

PREFERRED EXPERIENCE:

  • Proven experience in verifying commercially successful IPs, Subsystems and or SoCs.
  • Strong ability to provide mentorship and guidance to junior and senior engineers, a very effective team player, must have strong technical skills and provide a positive influence on team morale and culture.
  • Must be expert in SystemVerilog, UVM.
  • Proficient in object-oriented programming, scripting (Ruby, Python, Perl), and low-level programming languages.
  • PC System Architecture: PCI Express, SATA, USB, Ethernet, HyperTransport, x86, ARM.
  • Excellent knowledge of standard bus/interface protocols (i.e., AXI, AHB, AMBA, OCP, PIPE).
  • Experience with simulation profiling, efficiency improvements, acceleration, HLS tools/process.
  • Must be a self-starter, and able to drive independently and efficiently challenge time-critical tasks to on-time completion.
  • Strong communication, time management, and presentation skills.

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in Computer Engineering / Electrical Engineering
  • 9+ years of experience in related field

 

#LI-RD1

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: 

AMD is looking for an experienced Design Verification Engineer willing to take on the challenge of verifying a part of the PCIe Controller Design. In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering AI Infrastructure, Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team is responsible for the Verification of several critical PCIe components as well as the integration of lower level IPs and delivery to SoC. The team is responsible for verifying a balanced architecture between power consumption and performance, delivering high complexity RTL code and Verification components, as well as creating advanced testbenches using leading-edge verification techniques.

THE PERSON:

A successful candidate will work with architects and design and verification leads. The candidate will be highly accurate, independent and detail-oriented, possessing strong communication, mentoring and problem-solving skills. Can work well with cross functional teams. Skilled at driving tasks and initiatives from start to completion with superior quality. Strives to learn and perform at his or her highest potential in a technical capacity. Flexible in working hours to accommodate working with team members in different time-zones.

KEY RESPONSIBLITIES:

  • Work on functional verification execution from test plan to verification signoff.
  • Collaborate with architects and designers to understand the IP features.
  • Write/Implement/Review Test Plans.
  • Verification of critical high speed digital designs using both coverage driven constrained random and directed testing techniques as well as Formal verification.
  • Own some or all aspects of the Verification flow from initial test planning to coverage convergence and sign-off closure for one or more features and aspects of block level IP interoperability.
  • Build testbench components and develop test and sequence libraries by applying Object Oriented Programming Verification techniques following UVM methodology.
  • Conduct and contribute to Code Reviews.
  • Technical leadership, including block ownership from start to finish and verification sign-off.

 

PREFERRED EXPERIENCE:

  • Proven experience in verifying commercially successful IPs, Subsystems and or SoCs.
  • Strong ability to provide mentorship and guidance to junior and senior engineers, a very effective team player, must have strong technical skills and provide a positive influence on team morale and culture.
  • Must be expert in SystemVerilog, UVM.
  • Proficient in object-oriented programming, scripting (Ruby, Python, Perl), and low-level programming languages.
  • PC System Architecture: PCI Express, SATA, USB, Ethernet, HyperTransport, x86, ARM.
  • Excellent knowledge of standard bus/interface protocols (i.e., AXI, AHB, AMBA, OCP, PIPE).
  • Experience with simulation profiling, efficiency improvements, acceleration, HLS tools/process.
  • Must be a self-starter, and able to drive independently and efficiently challenge time-critical tasks to on-time completion.
  • Strong communication, time management, and presentation skills.

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in Computer Engineering / Electrical Engineering
  • 9+ years of experience in related field

 

#LI-RD1

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