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Logic RTL Design Engineer – SMTS
AMD’s Low Power Advanced Development team is seeking talented, self-motivated individuals to help develop low power innovations that enable industry-leading power efficient computing and graphics products. We have openings for R&D engineers to serve as key contributors in small project teams working on low power advanced development projects.
RESPONSIBILITIES:
- Logic RTL design for custom mixed-signal circuits in advanced CMOS technologies.
- Design logic blocks in Verilog for optimal performance/area/power.
- Closely work with Physical Design teams and IP and SoC level to optimize implementation, enable SoC integration, close timing, and solve any issues that arise through the design cycle.
- Create individually or in collaboration with other team members design reviews, technical reports, and other documentation required for meeting the design quality and for the tapeout signoff.
- Working with design leads to understand features to be implemented and verified.
- Initial verification and debugging test failures.
- Design documentation and verification plan creation.
- Specifying coverage points, reviewing functional and code coverage results and assisting to increase coverage.
- Provide support in simulation, emulation, and silicon environments.
PREFERRED EXPERIENCE:
- Must have experience in RTL level ASIC design, including use of a source control system and RTL linting tools, as well as be able to debug RTL code using simulation tools.
- Must be expert in Verilog and proficient in System Verilog, Verilog-A, C/C++, Perl, TCL, Unix shell scripting, and working in Linux and Windows environments. VCS/Verdi experience is a plus
- Must have experience guiding DV team verify IP RTL, mixed mode (cosim) & multi-voltage experience is a plus
- Experience with Lint, CDC, RDC, VCS NLP, VSI checks is a plus
- Must be able to understand, create and debug STA constraints.
- Strong understanding of synthesis, P&R and clock domain crossing design methodologies.
- Strong analytical thinking and problem-solving skills, excellent attention to detail, and good coding skills and style required.
- Understanding of basic analog blocks (Linear and Switching voltage regulators, DAC, ADC, comparators, oscillators, high speed circuits), as well as analog/mixed signal design concepts and CMOS processes are a plus.
- Strong communication skills, teamwork experience and a quick learner in a fast-moving environment.
EDUCATION:
MS or Ph D Electrical/Computer Engineering & 7+ years of work experience or BS with 9+ years.
LOCATION:
Austin, TX / Santa Clara, CA
#LI-G11
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Logic RTL Design Engineer – SMTS
AMD’s Low Power Advanced Development team is seeking talented, self-motivated individuals to help develop low power innovations that enable industry-leading power efficient computing and graphics products. We have openings for R&D engineers to serve as key contributors in small project teams working on low power advanced development projects.
RESPONSIBILITIES:
- Logic RTL design for custom mixed-signal circuits in advanced CMOS technologies.
- Design logic blocks in Verilog for optimal performance/area/power.
- Closely work with Physical Design teams and IP and SoC level to optimize implementation, enable SoC integration, close timing, and solve any issues that arise through the design cycle.
- Create individually or in collaboration with other team members design reviews, technical reports, and other documentation required for meeting the design quality and for the tapeout signoff.
- Working with design leads to understand features to be implemented and verified.
- Initial verification and debugging test failures.
- Design documentation and verification plan creation.
- Specifying coverage points, reviewing functional and code coverage results and assisting to increase coverage.
- Provide support in simulation, emulation, and silicon environments.
PREFERRED EXPERIENCE:
- Must have experience in RTL level ASIC design, including use of a source control system and RTL linting tools, as well as be able to debug RTL code using simulation tools.
- Must be expert in Verilog and proficient in System Verilog, Verilog-A, C/C++, Perl, TCL, Unix shell scripting, and working in Linux and Windows environments. VCS/Verdi experience is a plus
- Must have experience guiding DV team verify IP RTL, mixed mode (cosim) & multi-voltage experience is a plus
- Experience with Lint, CDC, RDC, VCS NLP, VSI checks is a plus
- Must be able to understand, create and debug STA constraints.
- Strong understanding of synthesis, P&R and clock domain crossing design methodologies.
- Strong analytical thinking and problem-solving skills, excellent attention to detail, and good coding skills and style required.
- Understanding of basic analog blocks (Linear and Switching voltage regulators, DAC, ADC, comparators, oscillators, high speed circuits), as well as analog/mixed signal design concepts and CMOS processes are a plus.
- Strong communication skills, teamwork experience and a quick learner in a fast-moving environment.
EDUCATION:
MS or Ph D Electrical/Computer Engineering & 7+ years of work experience or BS with 9+ years.
LOCATION:
Austin, TX / Santa Clara, CA
#LI-G11