Senior SOC Integration Design Engineer

Mar 08, 2023
San Jose, Philippines
... Not specified
... Senior
Full time
... Office work

WHAT YOU DO AT AMD CHANGES EVERYTHING

 

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

 

AMD together we advance_

THE ROLE: 

The focus of this role is to plan, build, and execute the design of new and existing features for AMD’s datacenter/automotive IP.  

 

THE PERSON: 

You have a passion for modern, complex processor architecture, digital design in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

 

KEY RESPONSIBILITIES: 

  • Perform Logic design for integration of hard macros, functional units,subsystems, vendor IPs into SoC designs.
  • Perform all aspects of the SoC design flow in high-level design, develop and maintain methodology/flows/checks.
  • Work closely with Chip Architecture, Design verification, Physical Design, DFT teams to achieve first tapeout success.
  • Work with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality
  • Participate in silicon bring-up for features owned

 

PREFERRED EXPERIENCE: 

  • Integrating ASIC IP into SOC & block level RTL design.
  • Automation using scripting techniques such as PERL, Python or TCL
  • Experience running quality checks such as Lint and CDC
  • Experience with simulation/debugging and building block level verification suites
  • Experience in synthesis, static timing analysis and ECO
  • Design interfacing to PD for floor planning and timing closure
  • Excellent verbal and written communication skills, ability to develop clear and concise engineering documentation

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

#LI-EM1

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: 

The focus of this role is to plan, build, and execute the design of new and existing features for AMD’s datacenter/automotive IP.  

 

THE PERSON: 

You have a passion for modern, complex processor architecture, digital design in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

 

KEY RESPONSIBILITIES: 

  • Perform Logic design for integration of hard macros, functional units,subsystems, vendor IPs into SoC designs.
  • Perform all aspects of the SoC design flow in high-level design, develop and maintain methodology/flows/checks.
  • Work closely with Chip Architecture, Design verification, Physical Design, DFT teams to achieve first tapeout success.
  • Work with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality
  • Participate in silicon bring-up for features owned

 

PREFERRED EXPERIENCE: 

  • Integrating ASIC IP into SOC & block level RTL design.
  • Automation using scripting techniques such as PERL, Python or TCL
  • Experience running quality checks such as Lint and CDC
  • Experience with simulation/debugging and building block level verification suites
  • Experience in synthesis, static timing analysis and ECO
  • Design interfacing to PD for floor planning and timing closure
  • Excellent verbal and written communication skills, ability to develop clear and concise engineering documentation

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

#LI-EM1

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