WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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SILICON DESIGN ENGINEER 2

THE ROLE:

AMD Verification Methodology and Technology (VMT) team delivers verification methodology and technology for all AMD teams and products. Team member will be working with global teams on the LowPower verification methodologies and technologies covering UPF generation, static checking and dynamic simulation with VCS-NLP.

THE PERSON:

A successful candidate in this position is expected to excel in analytical thinking, problem solving, organizing data, gathering requirements, planning and execution. He/she needs to be a self-starter who collaborates well with team members and customers alike to successfully drive tasks to completion.

KEY RESPONSIBILITIES:

•  The successful candidate will assume technical responsibilities and hands-on technical role responsible for providing LowPower verification methodologies in the hardware design verification space. The following is a list of key responsibilities that the candidate will assume:

  • Be a part of a wider team of technical experts in design verification and testbenches in AMD's Central methodologyteam
  • Be hands on technical contributor in the space of hardware description languages such as Verilog, testbench languages such as SystemVerilog
  • Play an expert role in verification methodologies and have extensive knowledge on Low Power design and verification
  • Demonstrate expertise in UPF and understand both the verification and implementation aspects of UPF
  • Demonstrate and utilize strong debugging skills in industry standard SOC/IP design & verification tools
  • Play a strong role in understanding AMD's existing systems, creating new ones, defining roadmaps on Low Power verification methodologies, tools and flows  
  • Collaborate with EDA vendors for tool trainings, evaluation and deployment and drive EDA vendors toward common solutions across AM

PREFERRED EXPERIENCE:

• Project level experience with low power design concepts and UPF implementation for same 
• Experience or familiarity with UPF based verification and functional verification tools by Synopsys (VCS), Cadence, Mentor Graphics 
• Good level in scripting and automation

IDEAL CANDIDATE WILL HAVE:

• Hands-on deep technical industry experience with Verilog, testbench, UPF
• Strong understanding of digital electronic design and design verification processes
• Knowledge of Verilog, Programming and Scripting languages
• Experience with EDA LowPower tools, Strong Simulation background and familiarity with VCS a must
• Good debugging skills with VCS/Verdi
• Must possess Strong interpersonal and communication skills and needs to be a team player
   

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering 

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SILICON DESIGN ENGINEER 2

THE ROLE:

AMD Verification Methodology and Technology (VMT) team delivers verification methodology and technology for all AMD teams and products. Team member will be working with global teams on the LowPower verification methodologies and technologies covering UPF generation, static checking and dynamic simulation with VCS-NLP.

THE PERSON:

A successful candidate in this position is expected to excel in analytical thinking, problem solving, organizing data, gathering requirements, planning and execution. He/she needs to be a self-starter who collaborates well with team members and customers alike to successfully drive tasks to completion.

KEY RESPONSIBILITIES:

•  The successful candidate will assume technical responsibilities and hands-on technical role responsible for providing LowPower verification methodologies in the hardware design verification space. The following is a list of key responsibilities that the candidate will assume:

  • Be a part of a wider team of technical experts in design verification and testbenches in AMD's Central methodologyteam
  • Be hands on technical contributor in the space of hardware description languages such as Verilog, testbench languages such as SystemVerilog
  • Play an expert role in verification methodologies and have extensive knowledge on Low Power design and verification
  • Demonstrate expertise in UPF and understand both the verification and implementation aspects of UPF
  • Demonstrate and utilize strong debugging skills in industry standard SOC/IP design & verification tools
  • Play a strong role in understanding AMD's existing systems, creating new ones, defining roadmaps on Low Power verification methodologies, tools and flows  
  • Collaborate with EDA vendors for tool trainings, evaluation and deployment and drive EDA vendors toward common solutions across AM

PREFERRED EXPERIENCE:

• Project level experience with low power design concepts and UPF implementation for same 
• Experience or familiarity with UPF based verification and functional verification tools by Synopsys (VCS), Cadence, Mentor Graphics 
• Good level in scripting and automation

IDEAL CANDIDATE WILL HAVE:

• Hands-on deep technical industry experience with Verilog, testbench, UPF
• Strong understanding of digital electronic design and design verification processes
• Knowledge of Verilog, Programming and Scripting languages
• Experience with EDA LowPower tools, Strong Simulation background and familiarity with VCS a must
• Good debugging skills with VCS/Verdi
• Must possess Strong interpersonal and communication skills and needs to be a team player
   

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering