Silicon Design Engineer 2

Jun 29, 2024
Markham, Canada
... Not specified
... Intermediate
Full time
... Office work

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

SILICON DESIGN ENGINEER 2
 

THE ROLE:

As part of the System-On-Chip (SOC) DFX team you will be involved in design, integration, verification & timing analysis for state-of-the-art Design-for-Test (DFT) and Design-for-Debug (DFD) features in complex AMD products. You will have the opportunity to be involved in all stages of the project execution from high level definition and test plan review, through design, verification, and emulation of those features until deliveries to Platform Debug teams and support during in-lab activities.

 

THE PERSON:

  • Must have excellent written and verbal communication skills
  • Must excel in a dynamic team working environment
  • Must be a self-starter and be able to independently drive tasks to completion
  • Leadership and mentoring skills are a definite asset
  • Ability to be flexible in terms of responsibilities

 

KEY RESPONSIBILITIES:

The successful candidate will report to the SOC DFD Design Verification and DFX Emulation Manager and will have the following responsibilities:

  • Write and review verification test-plans
  • Develop verification infrastructure, test-bench components, and test-cases for emulation
  • Generate and verify DFD and scan dump sequences
  • Provide DFD and scan dump support and debug on platform during lab activities

 

PREFERRED EXPERIENCE:

  • Knowledge of Verilog and C/C++Knowledge of scripting languages, such as Perl and TCL, is an advantage
  • Strong analytical/problem solving skills and pronounced attention to details
  • Familiar with entire ASIC design flow, hands on working experience on ASIC DFT/DFD design and verification is an advantage
  • Experience in complex ASIC design (multi-million gates) and in DFT/DFD techniques such as JTAG/IEEE standards, power-gating, on-chip debug logic is an advantage
  • Experience in verification of PHY protocols such as PCIE, XGMI, WAFL, GDDR6, USB2/3.1, and Display port is an advantage

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in Computer Engineering/Electrical Engineering

 

#LI-CC2

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SILICON DESIGN ENGINEER 2
 

THE ROLE:

As part of the System-On-Chip (SOC) DFX team you will be involved in design, integration, verification & timing analysis for state-of-the-art Design-for-Test (DFT) and Design-for-Debug (DFD) features in complex AMD products. You will have the opportunity to be involved in all stages of the project execution from high level definition and test plan review, through design, verification, and emulation of those features until deliveries to Platform Debug teams and support during in-lab activities.

 

THE PERSON:

  • Must have excellent written and verbal communication skills
  • Must excel in a dynamic team working environment
  • Must be a self-starter and be able to independently drive tasks to completion
  • Leadership and mentoring skills are a definite asset
  • Ability to be flexible in terms of responsibilities

 

KEY RESPONSIBILITIES:

The successful candidate will report to the SOC DFD Design Verification and DFX Emulation Manager and will have the following responsibilities:

  • Write and review verification test-plans
  • Develop verification infrastructure, test-bench components, and test-cases for emulation
  • Generate and verify DFD and scan dump sequences
  • Provide DFD and scan dump support and debug on platform during lab activities

 

PREFERRED EXPERIENCE:

  • Knowledge of Verilog and C/C++Knowledge of scripting languages, such as Perl and TCL, is an advantage
  • Strong analytical/problem solving skills and pronounced attention to details
  • Familiar with entire ASIC design flow, hands on working experience on ASIC DFT/DFD design and verification is an advantage
  • Experience in complex ASIC design (multi-million gates) and in DFT/DFD techniques such as JTAG/IEEE standards, power-gating, on-chip debug logic is an advantage
  • Experience in verification of PHY protocols such as PCIE, XGMI, WAFL, GDDR6, USB2/3.1, and Display port is an advantage

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in Computer Engineering/Electrical Engineering

 

#LI-CC2

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