Silicon Design Engineer 2

Mar 31, 2023
Santa Clara, Cuba
... Not specified
... Internship
Full time
... Office work

WHAT YOU DO AT AMD CHANGES EVERYTHING

 

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

 

AMD together we advance_

SILICON DESIGN ENGINEER 2

 

THE ROLE:

The System IP team is responsible for the development of AMD’s client and server memory controllers and Infinity Fabric interconnect. The Infinity Fabric is part of every new AMD product being developed across Client, Server, Graphics, and Semi-Custom markets.


The role involves RTL performance analysis and microbenchmarking for the Infinity Fabric IP performance team. The engineer will work closely with the architecture, design and modeling teams working on high-performance SOC interconnect designs. He or she will drive RTL microbenchmarking plans at the IP level, and support performance debug at the SOC level. In addition, the engineer will work closely with C++ performance modeling efforts to maintain correlation with the RTL.

 

THE PERSON:

The ideal candidate for this role is technically sound in computer architecture with a high degree of interest in memory system architectures. Successful candidates have a passion for learning and growing their technical boundaries. Excellent communication and data summarization skills are highly preferred, as is a willingness to work in a dynamic cross-site, cross-team environment.

 

KEY RESPONSIBILITIES:

  • Develop and maintain performance microbenchmarks for the Infinity Fabric IP, and debug performance bottlenecks in RTL simulations at IP or SOC level.
  • Develop and maintain IP performance debug tools.
  • Collaborate with C++ performance model team for correlation effort.
  • Develop and maintain infrastructure to support the above goals.

 

PREFERRED EXPERIENCE:

  • Fluent experience (academic and otherwise) with concepts of Computer Architecture and Computer Organization
  • Performance analysis experience is strongly preferred.
  • Familiarity with interconnect and memory system architecture.
  • Experience working on RTL pre-silicon design (coding or debug) of memory subsystems.
  • Expertise in one or more scripting languages like Perl or Python.

 

ACADEMIC CREDENTIALS:

  • Master of Science in Electrical and/or Computer Engineering, with advanced exposure to Computer Architecture and Memory System Architecture.

 

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SILICON DESIGN ENGINEER 2

 

THE ROLE:

The System IP team is responsible for the development of AMD’s client and server memory controllers and Infinity Fabric interconnect. The Infinity Fabric is part of every new AMD product being developed across Client, Server, Graphics, and Semi-Custom markets.


The role involves RTL performance analysis and microbenchmarking for the Infinity Fabric IP performance team. The engineer will work closely with the architecture, design and modeling teams working on high-performance SOC interconnect designs. He or she will drive RTL microbenchmarking plans at the IP level, and support performance debug at the SOC level. In addition, the engineer will work closely with C++ performance modeling efforts to maintain correlation with the RTL.

 

THE PERSON:

The ideal candidate for this role is technically sound in computer architecture with a high degree of interest in memory system architectures. Successful candidates have a passion for learning and growing their technical boundaries. Excellent communication and data summarization skills are highly preferred, as is a willingness to work in a dynamic cross-site, cross-team environment.

 

KEY RESPONSIBILITIES:

  • Develop and maintain performance microbenchmarks for the Infinity Fabric IP, and debug performance bottlenecks in RTL simulations at IP or SOC level.
  • Develop and maintain IP performance debug tools.
  • Collaborate with C++ performance model team for correlation effort.
  • Develop and maintain infrastructure to support the above goals.

 

PREFERRED EXPERIENCE:

  • Fluent experience (academic and otherwise) with concepts of Computer Architecture and Computer Organization
  • Performance analysis experience is strongly preferred.
  • Familiarity with interconnect and memory system architecture.
  • Experience working on RTL pre-silicon design (coding or debug) of memory subsystems.
  • Expertise in one or more scripting languages like Perl or Python.

 

ACADEMIC CREDENTIALS:

  • Master of Science in Electrical and/or Computer Engineering, with advanced exposure to Computer Architecture and Memory System Architecture.

 

COMPANY JOBS
1585 available jobs
WEBSITE