Silicon Design Engineer

Jul 01, 2022
Hsinchu, Taiwan
... Not specified
... Intermediate
Full time
... Office work

What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.


AMD NBIO (North Bridge IO) team delivers industry leading high-performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles.  NBIO global operates seamless from China, North America and Europe.

IOHUB sits in the center of all data paths, it includes 2 sub IP name as IOHub Core and IOMMU.   The IOMMU (I/O Memory Management Unit) is a system function that translates addresses used in DMA transactions, protects memory from illegal access by I/O devices, and remaps peripheral interrupts. It plays a critical role on IO virtualization technology which is widely used in today’s mega-data center.  Shanghai IOHUB team is expanding and hiring a verification lead focus on IOMMU sub IP.



Candidate will work as local IOMMU verification engineer and work with global IOHUB team on cutting edge IOMMU development. Candidate need to have solid IP verification background and good communication skill.



  • IOMMU new feature effort scoping and implementation
  • IOMMU feature test plan and DRVR writer, split down the tasks and assign to engineers
  • Attend global conference call for verification strategy alignment, status sync up etc. with global team
  • Accomplish assigned tasks on schedule
  • Sign-off owned features/projects



  • Complex IP/ASIC/SOC Design Verification, direct experience in IP/SOC or Processor (CPU or GPU) or Industry bus standard (PCI-e, HT) is preferred.
  • Good knowledge of UVM/Verilog/C/SystemVerilog.
  • Solid background with hardware verification methodologies
  • Experience of IP verification
  • Knowledge of Virtualization is an asset.
  • Good scripting languages (Perl, C Shell, Makefile, …) experience is plus.



Requisition Number: 172421 
Job Function: Design  


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