Silicon Design Engineer

Mar 17, 2024
Markham, Canada
... Not specified
... Intermediate
Full time
... Office work

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_



THE ROLE: 

We are looking for an adaptive, self-motivative design verification engineer/tech lead to join our growing RTG ML SOC DV team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading SOCs to HPC and AI/ML market. The RTG SOC DV team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. 

 

THE PERSON: 

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

 

KEY RESPONSIBILITIES: 

  • Collaborate with architects, hardware and firmware engineers to understand the new features to be verified
  • Develop/Maintain direct and random tests for functional verification at the SOC level 
  • Build SOC testbench components to support new verification requirements
  • Help on IP to SOC integration
  • Work on test plans, verification environment development, regression and coverage closure
  • Debug test failures to determine the problem's root cause 
  • Work with RTL designers and SOC/IP architects to resolve HW and configuration related issues 
  • The candidate should be able to work independently on new domain and deploy new methodology to wider range, drive a system task cross teams
  • Owns the SoC system level feature verification methodology and planning

 

PREFERRED EXPERIENCE: 

  • 7+ years of proven verification experience on large ASIC development projects
  • Experienced with Verilog, System Verilog, C, and C++ 
  • Developing UVM based verification frameworks and testbenches, processes and flows
  • Strong knowledge in Computer Architecture, familiar with topics: virtual memory, coherency, network on chip. 
  • Strong knowledge in RTL Design and Architecture
  • Scripting language experience: Perl, Python, Ruby
  • Exposure to leadership or mentorship
  • Strong analytical skills and attention to detail

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

#LI-PA1

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.



THE ROLE: 

We are looking for an adaptive, self-motivative design verification engineer/tech lead to join our growing RTG ML SOC DV team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading SOCs to HPC and AI/ML market. The RTG SOC DV team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. 

 

THE PERSON: 

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

 

KEY RESPONSIBILITIES: 

  • Collaborate with architects, hardware and firmware engineers to understand the new features to be verified
  • Develop/Maintain direct and random tests for functional verification at the SOC level 
  • Build SOC testbench components to support new verification requirements
  • Help on IP to SOC integration
  • Work on test plans, verification environment development, regression and coverage closure
  • Debug test failures to determine the problem's root cause 
  • Work with RTL designers and SOC/IP architects to resolve HW and configuration related issues 
  • The candidate should be able to work independently on new domain and deploy new methodology to wider range, drive a system task cross teams
  • Owns the SoC system level feature verification methodology and planning

 

PREFERRED EXPERIENCE: 

  • 7+ years of proven verification experience on large ASIC development projects
  • Experienced with Verilog, System Verilog, C, and C++ 
  • Developing UVM based verification frameworks and testbenches, processes and flows
  • Strong knowledge in Computer Architecture, familiar with topics: virtual memory, coherency, network on chip. 
  • Strong knowledge in RTL Design and Architecture
  • Scripting language experience: Perl, Python, Ruby
  • Exposure to leadership or mentorship
  • Strong analytical skills and attention to detail

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

#LI-PA1

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