Silicon Design Engineer

Apr 24, 2024
Oregon, United States
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




 

THE ROLE: 

We are seeking a seasoned SOC Physical Design implementation Lead with expertise in Power and Methodology improvements with advanced process nodes and complex architectures. You have had significant success driving Physical design implementation. You are meticulous about Power, Performance and Area while driving schedule and managing cost. This senior role will stretch you as you lead Physical design teams in new directions, technology and methodology improvements with our world-class SOC design teams

 

THE PERSON: 

You have excellent communication and presentation skills, demonstrated through Silicon success, innovative methodology and flow improvements, technical publications, presentations, trainings, etc.  You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.

. 

 

KEY RESPONSIBILITIES: 

  • Bring deep knowledge and experience in Physical design and apply them to large, challenging, leading-edge designs to ensure high quality on time delivery.
  • Bring significant experience in effective team leadership to help mentor, coach and grow the Physical Design Team with an emphasis on positive influence on team morale and culture
  • Technically lead Power optimization, methodologies, flows including sign-off for tapeout and post silicon efforts.
  • Technically drive different aspects of Physical Design including Chip Level Floor planning, Bus / Pin Planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, IR drop analysis, Physical Verification and Sign Off.
  • Experience and understanding of flow development and scripting.
  • Strong Technical problem and debugging solving.

 

PREFERRED EXPERIENCE: 

  • Experience in working on advance process nodes with 3D stack implementation.
  • Advanced level experience on CAD tools from Synopsys, Cadence and Mentor Graphics required.
  • Must be a self-starter and able to independently and efficiently drive challenging and time critical tasks to on-time completion.
  • Demonstrate expertize in Power optimization techniques.
  • Demonstrate expertize in Place & route, Timing Analysis, clock tree distribution, Physical Verification, Chip Integration.
  • Strong with tcl/Perl/Shell scripting.

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

#LI-PA1




At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

THE ROLE: 

We are seeking a seasoned SOC Physical Design implementation Lead with expertise in Power and Methodology improvements with advanced process nodes and complex architectures. You have had significant success driving Physical design implementation. You are meticulous about Power, Performance and Area while driving schedule and managing cost. This senior role will stretch you as you lead Physical design teams in new directions, technology and methodology improvements with our world-class SOC design teams

 

THE PERSON: 

You have excellent communication and presentation skills, demonstrated through Silicon success, innovative methodology and flow improvements, technical publications, presentations, trainings, etc.  You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.

. 

 

KEY RESPONSIBILITIES: 

  • Bring deep knowledge and experience in Physical design and apply them to large, challenging, leading-edge designs to ensure high quality on time delivery.
  • Bring significant experience in effective team leadership to help mentor, coach and grow the Physical Design Team with an emphasis on positive influence on team morale and culture
  • Technically lead Power optimization, methodologies, flows including sign-off for tapeout and post silicon efforts.
  • Technically drive different aspects of Physical Design including Chip Level Floor planning, Bus / Pin Planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, IR drop analysis, Physical Verification and Sign Off.
  • Experience and understanding of flow development and scripting.
  • Strong Technical problem and debugging solving.

 

PREFERRED EXPERIENCE: 

  • Experience in working on advance process nodes with 3D stack implementation.
  • Advanced level experience on CAD tools from Synopsys, Cadence and Mentor Graphics required.
  • Must be a self-starter and able to independently and efficiently drive challenging and time critical tasks to on-time completion.
  • Demonstrate expertize in Power optimization techniques.
  • Demonstrate expertize in Place & route, Timing Analysis, clock tree distribution, Physical Verification, Chip Integration.
  • Strong with tcl/Perl/Shell scripting.

 

ACADEMIC CREDENTIALS: 

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

 

#LI-PA1

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