SMTS Electrical Validation Engineer

Jul 05, 2024
Not specified,
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




THE ROLE

Be part of a dynamic team performing electrical validation of DC GPU SoC Post-Silicon IO interface, in a way that is end to end customer focused, innovative, efficient and drives highest quality standards. It requires both pre and post Si engagement and close collaborations within and outside the team to ensure design and test content robustness, ultimately delivering highest quality products to customers.

 

KEY RESPONSIBILITIES

  • In this role responsibilities will include but not be limited to:
  • Define and develop IO electrical validation requirements and electrical test coverages to guarantee compliance and success of the Server SoC devices at platform level.
  • Develop IO electrical validation strategies plans and schedules by integrating different requirements from various engineering and business departments.
  • Driving exploration of IO electrical validation methodology platform and infrastructure enablement to improve process and throughput.
  • Collaborate, review and influence design teams including hardware/packaging/board/platform during Pre-Si stage to ensure Pre-Si IO electrical simulation quality adhere to spec, to develop reference platform and to ensure validation hooks and dft availability.
  • Hands-on measurement and characterization of Post-Si IO electrical interfaces performance using hardware lab equipment such as oscilloscopes, TDR, VNA, logic analyzer, BERTScope, probing stations and etc.
  • Own, drive and debug Post-Si electrical bugs and performance marginality with hardware/BIOS/Firmware/Operating System implementations and recommends solutions.
  • Support system and tester level validation teams to identify and close analog and electrical issues.
  • Analysis and disposition of early customer returns to drive understanding of design marginalities or develop test content to screen these units where needed.
  • As part of a highly technical team, you will have the opportunity to innovate on and establish new test methodology, as well as new test development process improvements. Drive test optimizations to reduce test cost, enhance product quality, improve efficiency and accelerate stability.

PREFERRED EXPERIENCE:

  • Candidate must possess a Bachelor degree in Electrical/Electronic Engineering or equivalent with desired experience in analog/logic validation and characterization.
  • experience with:
    • Hardware architecture, logic/circuit design and implementation
    • Experience with any of the following DDR4/5, LPDDR4/5, U/R/LR DIMM JEDEC standards, PCIe4/5
    • Familiarity with programming / scripting language (C/C++, Python, Perl, ...)
    • Familiarity with DFT, hardware testing methods and tools
    • Working knowledge of Server OSes (Linux, Windows Server)
    • Familiarity with High speed circuit testing (oscilloscope and JBERT usage) 

ACADEMIC CREDENTIALS:

Bachelors or Master’s in computer engineering or computer science or electrical engineering, or comparable disciplines with 12 years of experience in SoC validation and debug.

 

LOCATION:

Penang, Malaysia

 

AI Team

 

#LI-HS

#LI-Hybrid

 




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE

Be part of a dynamic team performing electrical validation of DC GPU SoC Post-Silicon IO interface, in a way that is end to end customer focused, innovative, efficient and drives highest quality standards. It requires both pre and post Si engagement and close collaborations within and outside the team to ensure design and test content robustness, ultimately delivering highest quality products to customers.

 

KEY RESPONSIBILITIES

  • In this role responsibilities will include but not be limited to:
  • Define and develop IO electrical validation requirements and electrical test coverages to guarantee compliance and success of the Server SoC devices at platform level.
  • Develop IO electrical validation strategies plans and schedules by integrating different requirements from various engineering and business departments.
  • Driving exploration of IO electrical validation methodology platform and infrastructure enablement to improve process and throughput.
  • Collaborate, review and influence design teams including hardware/packaging/board/platform during Pre-Si stage to ensure Pre-Si IO electrical simulation quality adhere to spec, to develop reference platform and to ensure validation hooks and dft availability.
  • Hands-on measurement and characterization of Post-Si IO electrical interfaces performance using hardware lab equipment such as oscilloscopes, TDR, VNA, logic analyzer, BERTScope, probing stations and etc.
  • Own, drive and debug Post-Si electrical bugs and performance marginality with hardware/BIOS/Firmware/Operating System implementations and recommends solutions.
  • Support system and tester level validation teams to identify and close analog and electrical issues.
  • Analysis and disposition of early customer returns to drive understanding of design marginalities or develop test content to screen these units where needed.
  • As part of a highly technical team, you will have the opportunity to innovate on and establish new test methodology, as well as new test development process improvements. Drive test optimizations to reduce test cost, enhance product quality, improve efficiency and accelerate stability.

PREFERRED EXPERIENCE:

  • Candidate must possess a Bachelor degree in Electrical/Electronic Engineering or equivalent with desired experience in analog/logic validation and characterization.
  • experience with:
    • Hardware architecture, logic/circuit design and implementation
    • Experience with any of the following DDR4/5, LPDDR4/5, U/R/LR DIMM JEDEC standards, PCIe4/5
    • Familiarity with programming / scripting language (C/C++, Python, Perl, ...)
    • Familiarity with DFT, hardware testing methods and tools
    • Working knowledge of Server OSes (Linux, Windows Server)
    • Familiarity with High speed circuit testing (oscilloscope and JBERT usage) 

ACADEMIC CREDENTIALS:

Bachelors or Master’s in computer engineering or computer science or electrical engineering, or comparable disciplines with 12 years of experience in SoC validation and debug.

 

LOCATION:

Penang, Malaysia

 

AI Team

 

#LI-HS

#LI-Hybrid

 

COMPANY JOBS
1185 available jobs
WEBSITE