WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

SMTS SILICON DESIGN ENGINEER

THE ROLE:

This person will be part of next generation SOC Front-end Design/Integration team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture.

KEY RESPONSIBILITIES:

• Strong knowledge in IP/SOC design methodologies.
• Sound knowledge of SOC design/integration with Verilog/System Verilog
• Strong experience in Front-end design tools & flows, Synthesis, timing, full chip netlist flows
• Low power design
• Mentoring juniors and enhancing their skill set
• Must have strong knowledge of AMBA AHB/AXI protocol
• Working knowledge on code coverage, functional coverage, Lint, CDC etc
• IP development and coding using standard coding guide lines knowledge
• Excellent communication skills. Must be able to participate & lead in global meetings
• Soft skills to be able to work in a cross functional international teams, digital and software design engineers
• Knowledge on UPF, Low Power design and Low Power static analysis checks will be added advantage

PREFERRED EXPERIENCE:

• Minimum 14+ years of RTL design, Architecture, SOC implementation experience
• Experience with VCS simulation tool, Perl/Shell scripting, Verilog/System Verilog RTL design, and Lint/CDC/RDC tool flows 
• Ability to work well in a dynamic, fast-paced environment.

ACADEMIC CREDENTIALS:

• B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS SILICON DESIGN ENGINEER

THE ROLE:

This person will be part of next generation SOC Front-end Design/Integration team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture.

KEY RESPONSIBILITIES:

• Strong knowledge in IP/SOC design methodologies.
• Sound knowledge of SOC design/integration with Verilog/System Verilog
• Strong experience in Front-end design tools & flows, Synthesis, timing, full chip netlist flows
• Low power design
• Mentoring juniors and enhancing their skill set
• Must have strong knowledge of AMBA AHB/AXI protocol
• Working knowledge on code coverage, functional coverage, Lint, CDC etc
• IP development and coding using standard coding guide lines knowledge
• Excellent communication skills. Must be able to participate & lead in global meetings
• Soft skills to be able to work in a cross functional international teams, digital and software design engineers
• Knowledge on UPF, Low Power design and Low Power static analysis checks will be added advantage

PREFERRED EXPERIENCE:

• Minimum 14+ years of RTL design, Architecture, SOC implementation experience
• Experience with VCS simulation tool, Perl/Shell scripting, Verilog/System Verilog RTL design, and Lint/CDC/RDC tool flows 
• Ability to work well in a dynamic, fast-paced environment.

ACADEMIC CREDENTIALS:

• B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major.