SMTS Silicon Design Engineer

Apr 03, 2022
Beijing, China
... Not specified
... Intermediate
Full time
... Office work


What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

SOC Design Verification Engineer

THE ROLE:

CDC RTG GPU SOC team is looking for DV engineer that will work on design verification of cutting edge 3D GPU projects, to cover the SOC level feature including data-path and interrupt, virtualization, security, power management, etc.

 

KEY RESPONSIBILITIES:

  • Interface with global architecture and design teams, to create and execute SoC testplan including data-path, virtualization, security, power management, etc.
  • Implement directed and random test cases and TB in C++/UVM, as well as checkers and assertions
  • SoC DV testbench and infrastructure development and maintenance
  • Support integration and qualification of all the IPs for SoC
  • Help to improve DV environment building flow

 

EXPERIENCE AND SKILLS:

  • Rich experience of complex ASIC DV flow from plan to coverage, tech lead experience is desired
  • knowledgeable in C++ & SV, familiar with script languages like Ruby/Perl/Makefile…
  • Strong problem solving, communication and analytical thinking skills
  • Knowledge on computer architecture, general SoC design and feature set and PCIe devices is highly preferred
  • Good knowledge on verification methodologies like UVM is a big plus
  • Experience in power-aware verification is an asset
  • Be able to provide Technical mentoring and guidance to junior engineers

 

EDUCATION CREDENTIALS:

  • Master with at least 6 years or Bachelor with at least 8 years working experience in ASIC area

 

LOCATION:

  • Beijing / Shanghai

 

LI-VC1



Requisition Number: 146322 
Country/Region/Location: China State/Province: Beijing City: Beijing 
Job Function: 
Design  

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