Bengaluru, India
Not specified
Intermediate
Office work
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
SMTS SILICON DESIGN ENGINEER
Responsibilities
Responsible for owning and executing a PHY IP and/or a complex unit from RTL to GDS
Exposure in Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR
Extensive Experience in handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk
Hands on experience on 16nm, 14nm, 12nm, and sub-10nm projects
Good knowledge in Physical design, STA, methodology scripts (Tcl), knowledge on Perl, Python
Requirements
12+ years of professional experience in the semiconductor industry
Experience in FinFET & Dual Patterning nodes such as 16/14/12 and sub-10nm nodes
High-frequency design experience
CPU/GPU/memory Controller/ddr Or Other High Speed Units Experience
Excellent physical design and timing background
Synopsys Tools Experience Not a Must But Preferred
Would also prefer MNC experience
Familiarity with all Design areas and tools and solid understanding of design/technology interactions
Good understanding of computer organization/architecture
Strong analytical/problem solving skills and pronounced attention to details
Must be a self-starter, and able to independently drive tasks to completion
Good teamwork and communications skills are mandatory
Previous management experience highly desirable
some exposer/understanding on RTL is preferred
Education
BS + 12 years or MS + 10 years Electrical Engineering and/or Computer Architecture work experience
#LI-PK2
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
SMTS SILICON DESIGN ENGINEER
Responsibilities
Responsible for owning and executing a PHY IP and/or a complex unit from RTL to GDS
Exposure in Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR
Extensive Experience in handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk
Hands on experience on 16nm, 14nm, 12nm, and sub-10nm projects
Good knowledge in Physical design, STA, methodology scripts (Tcl), knowledge on Perl, Python
Requirements
12+ years of professional experience in the semiconductor industry
Experience in FinFET & Dual Patterning nodes such as 16/14/12 and sub-10nm nodes
High-frequency design experience
CPU/GPU/memory Controller/ddr Or Other High Speed Units Experience
Excellent physical design and timing background
Synopsys Tools Experience Not a Must But Preferred
Would also prefer MNC experience
Familiarity with all Design areas and tools and solid understanding of design/technology interactions
Good understanding of computer organization/architecture
Strong analytical/problem solving skills and pronounced attention to details
Must be a self-starter, and able to independently drive tasks to completion
Good teamwork and communications skills are mandatory
Previous management experience highly desirable
some exposer/understanding on RTL is preferred
Education
BS + 12 years or MS + 10 years Electrical Engineering and/or Computer Architecture work experience
#LI-PK2
