SMTS Silicon Design Engineer

Feb 13, 2024
Bengaluru, India
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




SMTS SILICON DESIGN ENGINEER

THE ROLE: 

As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON: 

As a Senior Member of Technical Staff, the successfully selected candidate will lead SOC Pattern generation and verification for AMD's next generation SOCs across pre-silicon and post-silicon platforms. These SOCs are among the biggest in the market with billions of transistors, consisting of AMD's high performance x86 cores, Graphics, Data fabric, and many communication IPs such as USB, PCIE etc.  The SOCs are based off the most complex process technologies. It’s not just a challenge to verify them but also a never-ending learning experience.

 

KEY RESPONSIBILITIES: 

  • Drive SOC Verification execution across Functional and DFX domains for pattern generation, verification, delivery and successful execution on SOC Silicon.
  • Work with post-Si (product engineering) team for Functional and DFX issues debug/resolution.
  • Work with DV team on test case planning, implementation, coding, debugging, and verification environment updates.
  • Conduct regular technical meetings and drive solutions.
  • Strong interpersonal skills to work across teams in different geographies.
  • Drive efficiency improvements and innovation to improve program cycles and turn-around time.

 

PREFERRED EXPERIENCE: 

  • Strong foundation in Systems and SoC architecture with good understanding in CPU, GPU, Memory sub-system, Fabrics, Coherency, Multimedia, I/O subsystems, Clocks, Resets, Virtualization and Security.
  • Hands on Experience with system Verilog and UVM.
  • Simulation waves debugging experience in QuestaSim/ DVE/ VERDI simulators.
  • Good knowledge on DFT Protocols such as JTAG/BSCAN/MBIST/SCAN/SECURITY etc.
  • JTAG, MBIST architecture understanding is a must.
  • Experience in SMS, LV-MBIST, BIRA, BISR, Memory repair analysis, Bit Mapping, Memory dump his highly recommended
  • Experience on post Silicon debug is preferred.  
  • 15+ years of experience in SOC Verification domains.

ACADEMIC CREDENTIALS: 

Bachelors/ Masters degree in Computer/Electrical Engineering with 15+ years of industry experience in relevant domains.

 

#LI-NF1




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS SILICON DESIGN ENGINEER

THE ROLE: 

As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON: 

As a Senior Member of Technical Staff, the successfully selected candidate will lead SOC Pattern generation and verification for AMD's next generation SOCs across pre-silicon and post-silicon platforms. These SOCs are among the biggest in the market with billions of transistors, consisting of AMD's high performance x86 cores, Graphics, Data fabric, and many communication IPs such as USB, PCIE etc.  The SOCs are based off the most complex process technologies. It’s not just a challenge to verify them but also a never-ending learning experience.

 

KEY RESPONSIBILITIES: 

  • Drive SOC Verification execution across Functional and DFX domains for pattern generation, verification, delivery and successful execution on SOC Silicon.
  • Work with post-Si (product engineering) team for Functional and DFX issues debug/resolution.
  • Work with DV team on test case planning, implementation, coding, debugging, and verification environment updates.
  • Conduct regular technical meetings and drive solutions.
  • Strong interpersonal skills to work across teams in different geographies.
  • Drive efficiency improvements and innovation to improve program cycles and turn-around time.

 

PREFERRED EXPERIENCE: 

  • Strong foundation in Systems and SoC architecture with good understanding in CPU, GPU, Memory sub-system, Fabrics, Coherency, Multimedia, I/O subsystems, Clocks, Resets, Virtualization and Security.
  • Hands on Experience with system Verilog and UVM.
  • Simulation waves debugging experience in QuestaSim/ DVE/ VERDI simulators.
  • Good knowledge on DFT Protocols such as JTAG/BSCAN/MBIST/SCAN/SECURITY etc.
  • JTAG, MBIST architecture understanding is a must.
  • Experience in SMS, LV-MBIST, BIRA, BISR, Memory repair analysis, Bit Mapping, Memory dump his highly recommended
  • Experience on post Silicon debug is preferred.  
  • 15+ years of experience in SOC Verification domains.

ACADEMIC CREDENTIALS: 

Bachelors/ Masters degree in Computer/Electrical Engineering with 15+ years of industry experience in relevant domains.

 

#LI-NF1

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