SMTS Silicon Design Engineer ( CAD/EDA methodology Verification Tools Engineer with 10+Yrs of exp)

Apr 10, 2024
Hyderabad, India
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




SMTS SILICON DESIGN ENGINEER

THE ROLE: 

This is a senior member of technical staff position for AMD’s Central Design Verification Tools & Methodology team. On the tools side, the position has software development for automated construction and integration of hardware designs, design verification software and Infrastructure software. On the Design Verification side, the position will work with CAD/EDA methodology around DV such as simulation, static checking, formal verification, etc. The position is also expected to mentor the individual contributors in the expertise area and train business units for the latest in tools.

 

The AMD Verification Methodology and Tools (VMT) team is a world-wide organization delivering verification methodology, automation around design creation, integration and verification, related software and flows for all AMD project teams and product lines. This position in the VMT team is expected to do tool development, provide guidance  on VMT methodology to key AMD programs and new teams. In this capacity he or she will also help collaborate with key internal and external stake holders to drive critical technical decisions across sites.  



THE PERSON:

A successful candidate in this position is expected to excel in analytical thinking, problem solving, tool development and have hands-on experience on resolving critical customer issues. He/she needs to be a self-starter who collaborates well with team members and customers alike to successfully drive tasks to completion. The expectation is to grow into technical expertise with internal tools domain, guide AMD project teams in the same area and drive solutions across the board, world-wide in due course of time. 

KEY RESPONSIBLITIES:

 

The successful candidate will contribute technical development in the tools and  guide others by providing insights in complex design methodologies in this space. The following is a list of key expectations that the candidate should have:

 

  • Good knowledge of front-end design construction and verification topics as well as infrastructure.

  • Understand the requirements for register and design interface descriptions and functional modeling of design descriptions for next-gen AMD projects and plan automation around it, and contribute in development of VMT register automation tools.

  • Utilize experience in Verilog/SystemVerilog, register descriptions and functional modeling, verification and implement automation around automatic register flow generation

  • Expected to learn and adapt to the needs of organization, have team spirit and guide/mentor/train others


P
REFERRED EXPERIENCE:

  • Experience in SoC Build, infrastructure tools & debugging related issues

  • Good programming aptitude and understanding of C/C++ and object-oriented concepts.

  • Expertise in SoC/IP register methodology and & hands-on in IP-SoC integration, related issues & debugging failures

  • Familiarity with IP-Xact will be a bonus

  •  

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering with 10+Yrs of exp

 

#LI-SR4




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS SILICON DESIGN ENGINEER

THE ROLE: 

This is a senior member of technical staff position for AMD’s Central Design Verification Tools & Methodology team. On the tools side, the position has software development for automated construction and integration of hardware designs, design verification software and Infrastructure software. On the Design Verification side, the position will work with CAD/EDA methodology around DV such as simulation, static checking, formal verification, etc. The position is also expected to mentor the individual contributors in the expertise area and train business units for the latest in tools.

 

The AMD Verification Methodology and Tools (VMT) team is a world-wide organization delivering verification methodology, automation around design creation, integration and verification, related software and flows for all AMD project teams and product lines. This position in the VMT team is expected to do tool development, provide guidance  on VMT methodology to key AMD programs and new teams. In this capacity he or she will also help collaborate with key internal and external stake holders to drive critical technical decisions across sites.  



THE PERSON:

A successful candidate in this position is expected to excel in analytical thinking, problem solving, tool development and have hands-on experience on resolving critical customer issues. He/she needs to be a self-starter who collaborates well with team members and customers alike to successfully drive tasks to completion. The expectation is to grow into technical expertise with internal tools domain, guide AMD project teams in the same area and drive solutions across the board, world-wide in due course of time. 

KEY RESPONSIBLITIES:

 

The successful candidate will contribute technical development in the tools and  guide others by providing insights in complex design methodologies in this space. The following is a list of key expectations that the candidate should have:

 

  • Good knowledge of front-end design construction and verification topics as well as infrastructure.

  • Understand the requirements for register and design interface descriptions and functional modeling of design descriptions for next-gen AMD projects and plan automation around it, and contribute in development of VMT register automation tools.

  • Utilize experience in Verilog/SystemVerilog, register descriptions and functional modeling, verification and implement automation around automatic register flow generation

  • Expected to learn and adapt to the needs of organization, have team spirit and guide/mentor/train others


P
REFERRED EXPERIENCE:

  • Experience in SoC Build, infrastructure tools & debugging related issues

  • Good programming aptitude and understanding of C/C++ and object-oriented concepts.

  • Expertise in SoC/IP register methodology and & hands-on in IP-SoC integration, related issues & debugging failures

  • Familiarity with IP-Xact will be a bonus

  •  

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering with 10+Yrs of exp

 

#LI-SR4

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